Advanced Semiconductor Engineering, Inc.

Tao-Yu Chen

Su Tao

Kao-Yu Hsu

Kun-Ching Chen

Chun-Che Lee

Yung-I Yeh

Chun Hung Lin

Shyh-Ing Wu

Wu-Chang Wang

Jau-Yuen Su

Chun-Hsiung Huang

A process for sawing a substrate strip marks corresponding to substrate areas of substrate strips which are arranged side-by-side on a plate. A saw machine is mechanically moved to the substrate areas and positioned by the alignment marks of corresponding substrate areas for cutting the substrate areas of the substrate strips in the first phase. Then the saw machine is further mechanically moved to the substrate areas again and is positioned by the alignment marks of corresponding substrate areas again for cutting the substrate areas of the substrate strips in the second phase. Therefore, an error in any of the substrate areas in the first phase and second phase will not accumulate to the subsequent substrate areas in the substrate strip.

Process for sawing substrate strip

A molding method for a BGA semiconductor chip package comprising a substrate supporting an array of chips having two lines of bonding pads formed at two respective side thereof. The molding method comprises the steps of: (A) providing a molding apparatus comprising a molding die having a molding cavity and at least two runners connected to the molding cavity; (B) closing and clamping the molding die in a manner that the chips are located in the molding cavity thereof; (C) transferring a molding compound into the molding cavity wherein each chip is arranged in a manner that the two lines of bonding pads thereof are substantially perpendicular to the flowing direction of the molding compound; (D) curing the molding compound; and (E) unclamping and opening the molding die to take out the molded product.

Molding method for BGA semiconductor chip package

The structure of a solder mask for the circuit module of a BGA substrate mainly comprises a power ring, a ground ring, a plurality of holes, a plurality of first holes and a plurality of second holes. The power ring and the ground ring are arranged between the chip area and the wire bonding area; the first openings are arranged on the power ring and the ground ring for receiving the electronic part. Thus the substrate meets the requirement of keeping the electronic part close to the chip. The second openings are arranged over the associated holes which electrically connect to the power ring and the ground ring by traces; these holes do need not to electrically connect the power layer and the ground layer of the substrate. The openings of the present invention use the power ring, ground ring and the holes of the substrate to electrically connect to the electronic parts, so that the present invention does not need to provide other holes or traces thus simplifying the structure of the substrate. The distance of two openings of the present invention can, moreover, be adjusted according to the length of the electronic part.

Structure of a solder mask for the circuit module of a BGA substrate

A semiconductor packaging device includes a printed circuit board substrate, a mold gate formed on a periphery of the printed circuit board substrate through which a package encapsulant is poured to enclose electric elements mounted on a side of the printed circuit board, and a layer of non-metallic material covered on the side of the printed circuit board substrate in the mold gate area. The package encapsulant, after hardened, is bonded with the layer of non-metallic material, and the bonded package encapsulant/the layer of non-metallic material is degatable from the mold gate.

Semiconductor packaging device

Growing community of inventors

Kaohsiung, Taiwan

Tao-Yu Chen