Qualcomm Incorporated

Microsoft Technology Licensing, LLC

Cisco Technology, Inc.

Apple Inc.

Combichem, Inc.

Tao Wang

Andrew Evan Gruber

Jian Liang

Kalyan Kumar Bhiravabhatla

Shambhoo Khandelwal

Vineet Goel

Mansour Keramat

Srihari Babu Alla

Thomas Edwin Frisinger

Gustavo A Plancarte

Vijay B Kurup

Sridhar Srinivasan

Jonnala Gadda Nagendra Kumar

Gang Zhong

Chunhui Mei

Yi Chun A Fu

Scott Phuong

Ryan O'Connell

Xuefeng Tang

Ellen Finch

Marta Karczewicz

Wei-Jung Chien

Yi Zhang

Yun Du

Cheng-Teh Hsieh

Avinash Seetharamaiah

Alexei Vladimirovich Bourd

Piyush Gupta

Natan Jacobson

Jing Gao

Satish Joseph Thomas

Andrew Edmund Turner

Serag Gadelrab

Meghal Varia

Deepak Kumar

Paul Chow

Eric Demers

Vinod Chamarty

Yang Yu

Feng Ge

Juraj Obert

Zilin Ying

Richard Hammerstone

Young In Yeo

Edwin Jose

Arijit Basu

Sri Srinivasan

Andrew Lejman

Kumar Sidhartha

Mark Sternberg

Baoguang Yang

Vahid Majidzadeh Bafar

Tom Longo

Marvin Leroy Vis

Minjie Huang

Vishwanath Shashikant Nikam

Julio Zegarra

Joshua Britton

Yang Xia

Thomas J Funk

Adimulam Ramesh Babu

Chandrasekar Venkataraman

Pavan Kumar Akkaraju

Chunlin Wang

Vladan Andrijanic

Ali Morshedi

Larry D Flowers

Daniel B Kassel

Jayasimha R Katukuri

Jonathan Newcomb Swirsky Whitney

Ouns Mouri

Venkatakrishnan S Sundaranatha

Dmitry Barsky

Krishna Mohan

Lu Zeng

Venkat Kranthi Chalasani

Yibin Zhang

Swapnil Palod

Clara Ka Wah Sung

Valeriy Chibisov

Nagarjuna Duvvuru

David Reinhold

Mudit Mittal

Michael V Dvorkin

Sreyas Kurumanghat

Chidananda Satya Kumar Patchava

Kyrylo Val

William L Licea-Kane

Shangmei Yu

Matthew Netsch

Zhenbiao Ma

Lihfang Shen

Sheng Peng

Thanh Duong

Erez Avigdor Falkenstein

Fredrick Alan Hickman

Ashokanand Neelambaran

Junmei Shao

Arash Rassouli

Rick Hammerstone

The present disclosure relates to methods and apparatus for graphics processing, e.g., a GPU. The apparatus may receive an image including a plurality of pixels associated with one or more workgroups and one or more pixel tiles, each of the workgroups and the pixel tiles including one or more pixels of the plurality of pixels. The apparatus may determine whether the one or more workgroups are misaligned with the one or more pixel tiles. The apparatus may determine a conversion order of the one or more workgroups when the one or more workgroups are misaligned with the one or more pixel tiles, the conversion order corresponding to a common multiple of one of the one or more workgroups and one of the one or more pixel tiles. The apparatus may convert each of the one or more workgroups based on the conversion order of the one or more workgroups.

Rasterization of compute workloads

Systems, devices, apparatus, and methods, including computer programs encoded on storage media, for truncation error signaling and adaptive dither for lossy bandwidth compression are described. A processor may perform a truncation process for data, where the data is associated with display processing, image processing, or the data processing, where the truncation process for the data results in truncated data. The processor may compute a set of truncation error values associated with the truncation process for the truncated data. The processor may generate a set of residual samples for the truncated data. The processor may generate a bitstream based on the set of residual samples for the truncated data and the set of truncation error values associated with the truncation process.

Truncation error signaling and adaptive dither for lossy bandwidth compression

A host that runs a security component and a container such that code running within the container cannot access data and resources running on the host except through a predetermined location (e.g., a container file system folder) that is visible from within the container. The security component helps to provide this safety by facilitating input of input data to the container, and facilitating output of output data from the container. Such containers and host security components may similarly operate on multiple hosts. An overlay network may be present over multiple of such containers to thereby allow the code within containers to communicate with each other, even if the code is running on different computing systems, so long as the code is running within the overlay network.

Controlled data access via container visible location

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for improving visibility generation in tile-based GPU architectures. A graphics processor may perform a first binning pass associated with visibility information for each of a plurality of primitives in at least one frame. The visibility information for each of the plurality of primitives may correspond to a visible indication or an invisible indication. The graphics processor may update a depth buffer based on the visibility information for all of the plurality of primitives in the at least one frame. The graphics processor may perform a second binning pass for each of the visible set of primitives based on the updated depth buffer. The graphics processor may store at least one of the updated visibility information or updated position data for all primitives in the visible set of primitives from the second binning pass.

Visibility generation improvements in tile based GPU architectures

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for compatible compression for different types of image views. A graphics processor may select a first common format of a plurality of common formats for at least one image based on at least one of application data or first metadata associated with the at least one image. The graphics processor may encode the at least one image based on the selected first common format for the at least one image. The graphics processor may select a second common format for the at least one image based on second metadata of the at least one image. The second common format may be identical to the first common format. The graphics processor may decode the at least one image based on the selected second common format for the at least one image.

Compatible compression for different types of image views

The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may configure a portion of a GPU to include at least one depth processing block, the at least one depth processing block being associated with at least one depth buffer. The apparatus may also identify one or more depth passes of each of a plurality of graphics workloads, the plurality of graphics workloads being associated with a plurality of frames. Further, the apparatus may process each of the one or more depth passes in the portion of the GPU including the at least one depth processing block, each of the one or more depth passes being processed by the at least one depth processing block, the one or more depth passes being associated with the at least one depth buffer.

Optimization of depth and shadow pass rendering in tile based architectures

Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a plurality of primitives associated with one or more frames in a scene, a portion of the scene being associated with an upscaled sample space and/or a downscaled sample space. The apparatus may also perform a binning pass for the plurality of primitives, the binning pass being associated with an unscaled sample space, where the binning pass sorts each of the primitives into one or more bins associated with each of the one or more frames. Further, the apparatus may perform one of one or more rendering passes for each of the one or more bins. The apparatus may also rasterize each of the plurality of primitives based on at least one of the upscaled sample space or the downscaled sample space.

Foveated binned rendering associated with sample spaces

Methods, systems, and devices for graphics processing are described. A device may receive an image including a set of pixels. The device may render a first subset of pixels in each bin of a set of bins during a first rendering pass, and defer rendering a second subset of pixels and a third subset of pixels in each bin of the set of bins during the first rendering pass. The second subset of pixels may include edge pixels and the third subset of pixels may be between the first subset of pixels and the second subset of pixels. The device may render the second subset of pixels and the third subset of pixels in each bin of the set of bins during a second rendering pass based on rendering the first subset of pixels. The device may then output the image based on the first and second rendering pass.

Bin filtering

The present disclosure relates to methods and apparatus for graphics processing. Aspects of the present disclosure can determine a portion of a display area, where the portion of the display area is determined based on display content of the display area. Further, aspects of the present disclosure can communicate display information corresponding to the determined portion of the display area. Additionally, aspects of the present disclosure can update the display information corresponding to the determined portion of the display area. Aspects of the present disclosure can also communicate the updated display information corresponding to the determined portion of the display area. Aspects of the present disclosure can also render at least some display content of the display area corresponding to the determined portion of the display area. In some aspects, the updated display information can be based on the rendered display content of the display area.

Methods and apparatus for reducing the transfer of rendering information

Methods and apparatus are disclosed for near field radio-frequency (RF) testing of devices, particularly user equipment (UEs) capable of millimeter-wave (mmWave) transmissions. An exemplary test apparatus is described that uses a transducer to facilitate near field over-the-air testing of UEs in the mmWave transmission band. The transducer may be an orthomode transducer and may include a dual-polarity port positioned in the reactive near field of an antenna of a device under test (DUT). For UE signal transmission tests, the orthomode transducer splits test signals received from the antenna of the DUT via the dual-polarity port into a pair of single-polarity RF signals. The single-polarity RF signals are separately fed through a pair of waveguide-to-coaxial adaptors into separate coaxial cables, which feed coaxial transmission versions of the single-polarity RF signals to test equipment for analysis. UE signal reception tests are also described that utilize the same or different orthomode transducer.

Near field wireless communication device testing using dual-polarity transducer

The present disclosure relates to methods and apparatus for graphics processing. An example method generally includes receiving, at a graphics processing unit (GPU), a plurality of commands corresponding to a plurality of draws across a frame, each of the plurality of commands indicating a depth test direction with respect to a low-resolution depth (LRZ) buffer for the corresponding draw. The method generally includes maintaining, at the GPU, a LRZ status buffer to store a corresponding depth test direction for a first command in time of the plurality of commands processed by the GPU. The method generally includes disabling, at the GPU, use of the LRZ buffer for depth testing for any of the plurality of commands remaining unprocessed after processing a command of the plurality of commands having a different depth test direction than the corresponding depth test direction stored in the LRZ status buffer.

GPU hardware-based depth buffer direction tracking

A signal coupling method and apparatus is disclosed. A coupling network is coupled to convey signals from first functional circuit block to a second functional circuit block. The coupling network includes a first signal path having a first capacitor for providing AC coupling between the first and second functional circuit blocks. The coupling network further includes a second signal path in parallel with the first signal path. The second signal path includes a switched capacitor circuit coupled to receive a first common mode voltage corresponding to the first functional circuit block and a second common mode voltage corresponding to the second functional circuit block.

Signal coupling method and apparatus

Capacitor arrays and methods of operating a digital to analog converter are described. In an embodiment, a capacitor array includes a unit capacitor (Cu) structure characterized by a unit capacitance value, a plurality of different super-unit capacitor structures, and a plurality of different sub-unit capacitor structures, each different sub-unit capacitor structure having a different capacitance defined by a division of the unit capacitance value.

Capacitor structure with correlated error mitigation and improved systematic mismatch in technologies with multiple patterning

In some implementations, a computing device can improve diversity in media item recommendations. For example, the computing device can generate a satisfaction score representing an estimate of the amount satisfaction a user will experience when a candidate media item selected by the user is presented (e.g., played) by the system. The system can determine the difference in satisfaction scores for similar media items over time to determine the amount of satisfaction gained with a subsequent selection and presentation of similar candidate media items. The system can rank candidate media items based the satisfaction gain calculated for each candidate media item and select suggested media items to present to the user based on the candidate media items having the highest satisfaction gain. In some implementations, the computing device can generate satisfaction scores based on an adventurousness score calculated for the user.

Diversity in media item recommendations

In one aspect, a system for performing graph searches in an SQL style query for monitored data includes a processor; a memory; and one or more modules stored in the memory and executable by a processor to perform operations including: receive, by a controller in communication with agents installed at machines connected over a network, monitored data regarding applications running over the machines; identify performance issues from the received monitored data; provide an interactive user interface to enable creation of a query for the monitored data and the identified performance issues; receive input associated with a new query including a SELECT clause, a FROM clause, and a WHEREIN clause; create the new query based on the received input; convert at least a portion of the new query to contain a graph traversal path entirely within the FROM clause; execute the new query; and return a result.

Graph search in structured query language style query

Growing community of inventors

Sunnyvale, CA, United States of America

Tao Wang