Sun Microsystems, Inc.

Quickturn Design Systems, Inc.

Tao Shinn Chen

Dam Van Bui

A class structure of an object-oriented program system is optimized for hardware and implemented as a hardware system in an object-oriented processor. For example, a class structure derived from a Java Virtual Machine software system is optimized for hardware and implemented as a hardware Java object-oriented processor. A processor is implemented by defining a data structure and an object-oriented instruction set for executing in the object-oriented operating environment, and generating a hardware implementation of the processor enforcing the logical relationships of the instruction set as defined by the data structure. The data structure includes a class structure. The class structure and the instruction set describe the processor operations. A processor includes an execution engine based on a class structure to execute instructions of an object-oriented instruction set. The instruction set uses pointers for indexing through data structures to define an object method for execution. At the top of the data structure is a class structure for selecting the static class for creating objects. Once the class is found by indexing through the class structure, a constant pool is accessed to supply information to further describe the data structures that are used for creating an object and executing an object method. A processor includes an execution unit and a memory. The memory stores a data structure including a class structure. Classifiers are selected by a program and loaded. The class structure directs the instantiation of the loaded classifiers into objects. The execution unit executes object methods directed by the class structure.

Object-oriented processor architecture and operating method

A configurable method and apparatus for implementing the various large memory instances commonly found in a user's design in a hardware logic emulation system is disclosed. No external boards or systems are required to implement typical memory instances. The method and apparatus sorts the memory instances in the user's input design, packing as many memory instances as possible into a physical RAM on the emulation boards. The method also counts the number of physical RAMs necessary to implement the plurality of memory instances. The method maps the memory instances into physical RAMs, and routes the address, data and control signals and controller circuit into a programmable logic chip.

Growing community of inventors

Cupertino, CA, United States of America

Tao Shinn Chen