Integrated Device Technology, Inc.

Silicon Spread Corporation

Exar Corporation

Tao Jing

Chenxiao Ren

Yongmin Ge

Jagdeep Singh Bal

Vasanth Krishna Namasivayam

Maidong Dai

A charging system for a mobile device includes a transmitter and a receiver. The transmitter includes (a) a first interface to a power source; (b) a second interface to the receiver; (c) a polarity detection circuit for detecting polarities of the; and (d) first and second switches controlled by the polarity detection circuit, wherein each switch selectively connects a terminal of the first interface to a terminal of the second interface. The receiver includes: (a) a first interface; (b) a second interface coupled to a device to be charged; and (c) a connection circuit between a terminal of the first interface and a terminal of the second interface, wherein the connection circuit is conductive when the voltage across these terminals is of a first polarity, and a second polarity otherwise.

Wireless charger circuit and method

A wireless charger and a method allow the wireless charger to have enhanced portability and a smaller footprint when not performing the charging function. The wireless charger includes a charging circuit providing power on one or more power lines, a housing for the wireless charger, and a flexible platform that includes a charging surface with two or more contact electrodes. The flexible platform may be unfolded or unrolled for charging a mobile device, and folded up or rolled up to achieve a smaller footprint, when not performing a charging operation. The wireless charger may further includes a data communication circuit for data communication between a power-line network and the mobile device.

Wireless charger for mobile devices with flexible platform and method

A wireless direct contact charger includes (a) a voltage supply; (b) a first plate electrode and a second plate electrode; (c) a polarity detection circuit that detects; and (d) a switching circuit. When the first electrode or the second electrode of the portable device is placed on the first plate electrode or the second plate electrode, the polarity detection circuit detects the polarity of the portable device charging terminals (i.e, whether the first electrode of the portable device is in contact with the first plate electrode, the second electrode of the portable device is in contact with the first plate electrode or any other suitable orientations). Based on the detected polarity, the switching circuit connects the first plate electrode and the second plate electrode to the voltage supply to provide an output voltage to the portable device for charging its battery.

Wireless battery charger for mobile devices and method thereof

The present invention provides for EMI mitigation in switching circuitry, such as power converters, by implementing a controlled, non-random change in frequency in every cycle of switch control signals based on a static or dynamically changing modulation cycle. This permits frequency spreading across a wide range while avoiding excessive jitter between cycles and voltage dropouts common to randomized EMI control circuitry. Further, since it may be implemented digitally, some embodiments may avoid performance, size and power consumption problems experienced by mixed signal or analog switch control circuitry and EMI control circuitry. Further still, implementations of the present invention may mitigate EMI from a constant frequency source without the necessity of a variable frequency source, such as one generated by a VCO, to realize frequency variation. By eliminating the need for analog and mixed signal circuitry, and additional corrective circuitry, some embodiments may also reduce design, testing and production costs.

EMI mitigation of power converters by modulation of switch control signals

A method and apparatus for implementation of high order MASH by reuse of single stage MASH have been described.

Method and apparatus for implementation of high order MASH by reuse of single stage MASH

An apparatus includes an adjustable oscillator circuit configured to generate an output signal having a frequency that varies responsive to a frequency control signal and a frequency reference generator circuit configured to produce a frequency reference signal. The apparatus further includes a calibration circuit configured to determine a relationship of the output signal to the frequency reference signal and to enable and disable the frequency reference generator circuit based on the determined relationship.

Frequency synthesizers with dynamic calibration intervals

An apparatus is provided for detecting the loss of an input clock signal for a phase-locked loop (PLL). The apparatus includes a time delay circuit, a first frequency divider and a digital logic circuit. The time delay circuit receives the input clock signal and outputs a first time-delayed clock signal. The first frequency divider receives an input signal from an internal clock of the PLL and outputs a clock signal having the same frequency or a lower frequency than that of the time-delayed clock signal. The digital logic circuit that receives the first frequency divider output signal and the first time-delayed clock signal and outputs a signal indicating the loss of the input clock signal if there is no first time-delayed clock signal for a cycle of the first frequency divider output signal.

Apparatus and method for detecting the loss of an input clock signal for a phase-locked loop

An electrostatic discharge (ESD) protection circuit configured completely inside one of a power pad and an I/O pad of an electronic circuit, the ESD protection circuit comprising an electrostatic discharge (ESD) circuit that, when activated, discharges an ESD from a first voltage bus to a second voltage bus. The second voltage bus is at a lower electrical potential than the first voltage bus. An ESD discharge control circuit in electrical connection with the ESD discharge circuit that controls the activation of the ESD discharge circuit and including an NMOS transistor and an electrical node. The NMOS transistor regulating a rate of voltage decay of the electrical node from a predetermined high voltage level to a lower voltage level, the regulation of the rate of voltage decay of the electrical node is non-linear. The activation of the ESD discharge circuit determined by the rate of voltage decay of the electrical node.

ESD protection circuit for inside a power pad or input/output pad

A clock circuit includes a phase-lock loop for generating an output clock signal based on a data signal and a harmonic frequency detector for detecting whether the frequency of the output clock signal is a harmonic frequency of a frequency of a reference clock signal. The harmonic frequency detector includes a counter for generating a first divided clock signal by dividing the frequency of the output clock signal by a first divisor. Additionally, the harmonic frequency detector includes a counter for generating a second divided clock signal by dividing the frequency of the reference clock signal by a second divisor. The harmonic frequency detector also includes a frequency comparator for generating an output indicating whether the frequency of the output clock signal is a harmonic frequency of the frequency of the reference clock signal based on the first divided clock signal and the second divided clock signal.

Clock circuit with harmonic frequency detector

Input clock detection circuit for powering down a PLL-based system

An image sensor integrated circuit with a pixel cell having photogates wherein each photogate has a number of gaps which allow light to penetrate to the substrate. The gaps are open in the direction of the floating diffusion, in order to minimize the trapping of charges. In a preferred embodiment, the floating gate has a comb structure, with the tines of the comb extending toward the floating gate. Preferably, the tines or fingers are wider than the gaps. In a preferred embodiment, the gaps are no wider than 3 microns.

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Fremont, CA, United States of America

Tao Jing