Intermune, Inc.

Shanghai Huali Microelectronics Corporation

Other

Microsoft Technology Licensing, LLC

Qualcomm Incorporated

Shanghai University

Alnova Pharmaceuticals, Ltd.

Tao Hu

Leonid Beigelman

Scott D Seiwert

Vladimir Serebryany

Karl Kossen

Donald Ruhrmund

Luca Francesco Mario Raveglia

Stefania Vallese

Ivana Bianchi

Lei Zhang

Haoyu Chen

Zhi Tian

Qiwei Wang

Xiaochuan Wang

Yu Wang

Jiang Wang

Luca Francesco Raveglia

Yun Dong

Paul Yuknewicz

Antoine Cote

Xini Zhang

John Z Chen

Zhongming Ren

Ting Xie

John W Hart, Ii

Wenhui Zhu

Chaoyue Chen

Ruixin Zhao

Yugang Yang

Tianyou Cai

Zhigang Xiong

Sansan Shuai

A high-energy beam additive manufacturing forming device and forming method, comprising a magnetic field unit for assisting additive forming, and further comprising a forming base () for placing a material () to be processed, and a high-energy beam generation device which emits a high-energy beam, acts on the material () to be processed and forms a molten pool (). The magnetic field unit comprises a first magnetic field generating device (), and the first magnetic field generating device () comprises an induction coil () provided below the molten pool (). The first magnetic field generating device () is detachably provided below a surface, used for containing the material () to be processed, of the forming base (); second magnetic field generating devices () are provided above the forming base ().

High-energy beam additive manufacturing forming device and forming method

The present invention provides a semiconductor structure for a split gate flash memory cell and a method of manufacturing the same. The split gate flash memory cell provided by the present invention at least includes a select gate and a floating gate formed on the substrate, one side of the select gate is formed with an isolation wall, and the floating gate is on the other side of the isolation wall. An ion implantation region is formed in an upper portion of the substrate below the isolation wall, wherein the ion implantation type of the ion implantation region is different from the ion implantation type of the substrate. The manufactured split gate flash memory cell can reduce the influence of the channel inversion region on the channel current, thereby improving the characteristics of the channel current of the flash cell and optimizing the device performance.

Semiconductor structure of split gate flash memory cell

The present invention provides a semiconductor structure for a split gate flash memory cell and a method of manufacturing the same. The split gate flash memory cell provided by the present invention at least includes a select gate and a floating gate formed on the substrate, one side of the select gate is formed with an isolation wall, and the floating gate is on the other side of the isolation wall. An ion implantation region is formed in an upper portion of the substrate below the isolation wall, wherein the ion implantation type of the ion implantation region is different from the ion implantation type of the substrate. The invention also provides a manufacturing method for manufacturing the above-mentioned split gate flash memory cell, and the manufacturing method provided by the invention can be compatible with the existing manufacturing process of the split gate flash memory cell without increasing the process cost and the process complexity. The manufactured split gate flash memory cell can reduce the influence of the channel inversion region on the channel current, thereby improving the characteristics of the channel current of the flash cell and optimizing the device performance.

Semiconductor structure of split gate flash memory cell and method for manufacturing the same

The present invention relates to an amorphous form of Idelalisib and its methods of preparation. Using a Cu-K&#x3b1; radiation, the X-ray powder diffraction (XRPD) pattern does not contain sharp diffraction peaks at a diffraction angle expressed in degrees 2&#x3b8;, and the X-ray powder diffraction pattern is shown in FIG.. The present invention also provides a preparation method for the amorphous form of Idelalisib. The amorphous form of Idelalisib of the present invention increases the solubility of Idelalisib and improves bioavailability of the drug product. As compared to the existing crystalline forms of Idelalisib, its solubility increases significantly, which improves body's absorption of the drug and makes it more efficacious in the clinical therapeutic treatment of diseases. Under the stress test conditions, the amorphous material can maintain good physical and chemical stabilities. The preparation method of amorphous Idelalisib according to the present invention is simple to operate and easy to implement.

Amorphous substance of Idelalisib and preparation method therefor

Disclosed are compounds and methods for treating inflammatory and fibrotic disorders, including methods of modulating a stress activated protein kinase (SAPK) system with an active compound, wherein the active compound exhibits low potency for inhibition of the p38 MAPK; and wherein the contacting is conducted at a SAPK-modulating concentration that is at a low percentage inhibitory concentration for inhibition of the p38 MAPK by the compound. Also disclosed are derivatives and analogs of pirfenidone, useful for modulating a stress activated protein kinase (SAPK) system. Mederski et al., Tetrahedron (1999), 55(44), 12757-12770.* Azuma et al., 'A placebo control and double blind phase II clinical study of pirfenidone in patients with idiopathic pulmonary fibrosis in Japan', Am J Respir Crit Care Med., 165:A729 (2002). Badger, et al., 'Pharmacological profile of SB 203580, a selective inhibitor of cytokine suppressive binding protein/p38 kinase, in animal models of arthritis, bone resorption, endotoxin shock and immune function', J. Pharmacol. Exp. Ther. 279:1453-61 (1996).

Compounds and methods for treating inflammatory and fibrotic disorders

A mobile device () includes an oscillator () to generate a reference clock signal, a phase-locked loop (PLL) circuit () to generate a PLL output clock signal, a transceiver (), a system-on-a-chip (SOC) () including a processor () and a number of other modules, and a control logic (). The transceiver () generates a status control signal that indicates whether the transceiver () is in an active state or in an idle state. The control logic () receives the status control signal, and in response thereto, selectively enables/disables the PLL circuit (), selectively routes either the reference clock signal or the PLL output clock signal to the processor () and/or the other modules of the SOC (), and/or selectively routes either an idle clock signal or the PLL output clock signal to the transceiver ().

Clock structure for reducing power consumption on wireless mobile devices

Disclosed are compounds and methods for treating inflammatory and fibrotic disorders, including methods of modulating a stress activated protein kinase (SAPK) system with an active compound, wherein the active compound exhibits low potency for inhibition of the p38 MAPK; and wherein the contacting is conducted at a SAPK-modulating concentration that is at a low percentage inhibitory concentration for inhibition of the p38 MAPK by the compound. Also disclosed are derivatives and analogs of pirfenidone, useful for modulating a stress activated protein kinase (SAPK) system.

Form controls can be reused so that the control can be bound to large volumes of data without adverse performance issues because of a large number of controls. A maximum number of rows of data N that can appear in a form are calculated. A container in memory is created for N+2 rows. The additional two rows are used to store the row after the last displayed row and the row previous to the first displayed row. In response to a user scroll or tab operation, rows within the container are reused. Child controls are hosted by the control and are also reused when the data is scrolled out of view.

Rendering a customized list of controls

Growing community of inventors

Shanghai, China

Tao Hu