Synopsys, Inc.

Tao-Chun Yu

Hsien-Shih Chiu

Philip Hui-Yuh Tai

Shao-Yun Fang

Kai-Shun Hu

Henry Sheng

Cindy Chin-Fang Shen

An efficient electronic structure for circuit design, testing and/or manufacture for validating a cell layout design using an intelligent engine trained using selectively arranged cells selected from a cell library. An initial design rule violation (DRV) prediction engine is initially trained using a plurality of pin patterns generated by predefined cell placement combinations, where pin patterns are pixelized and quantified and is classified as either (i) a DRV pin pattern (i.e., pin patterns likely to produce a DRV) or (ii) a DRV-clean pin pattern (i.e., pin patterns unlikely to produce a DRV).

Growing community of inventors

Taipei, Taiwan

Tao-Chun Yu