Nec Corporation

Tamio Okui

Hiroyuki Tanaka

Shinichi Kono

Tomoyoshi Ishikawa

Atsushi Takahara

A Ca server generates and encrypts a work key (Kw) and delivers the key to receiving terminals. The CA server further updates scramble key (Ks) at a predetermined interval and delivers the key to the terminals. A contents server encrypts service contents using the Kw and the Ks to deliver the contents toward an IP address for the group. A delivering router receives the contents and delivers the content to the receiving terminals based on the IP address. The receiving terminals, when receives the encrypted contents, decode the contents using the Kw and the Ks and replace the IP address with its own IP address.

System, method, and medium for broadcasting service contents

A demodulator circuit and a demodulating method are disclosed. A demodulator including a phase-locked loop for a receive carrier recovery or a phase lock recovery demodulates an input received signal and a band of a loop filter of the phase-locked loop is controlled by a control signal. A bit error rate monitor detects a bit error rate of a demodulated outputs the control signal on the basis of the bit error rate result of the demodulator, and a loop filter band controller output from the bit error rate monitor. Hence, the bit error rate of the demodulated signal is detected and the loop filter band of the phase-locked loop of the demodulator is controlled based on the detected bit error rate. As a result, an exact control of the loop filter band of the demodulator can be performed on the basis of the received signal state without using any received signal power detector, any C/N detector or the like.

Demodulator circuit and demodulating method employing bit error rate

A frequency synthesizer comprises a voltage controlled generator (11) for generating an output signal of a desired frequency in response to a control signal and a reference signal generator (13) for generating a reference frequency signal. The output signal is sampled (21) by the reference frequency to produce a sampled signal. The reference frequency signal is frequency divided (22) by a division factor determined by the desired frequency and the reference frequency. The sampled signal and the divided signal are compared (15) in phase and frequency and the control signal is produced depending on the phase difference between the two signals. For the division factor, two different values are determined by the desired frequency and the reference signal and one of the two values is selected according to a selection pattern determined by the reference frequency and the desired frequency. A control circuit (41) calculates the two values and a multistage frequency divider (42) generates the selection pattern signal under control of the control circuit (41).

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Tokyo, Japan

Tamio Okui