Kabushiki Kaisha Toshiba

Tamio Nakai

Makoto Shibusawa

Tetsuya Iizuka

Akira Kubo

Kazushige Mori

Hideo Kawano

Masayuki Dohjo

An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127). With such an arrangement, an appropriate storage capacitor can be formed by causing the scanning lines and pixel electrode to overlap each other without having to decrease the manufacturing yield while enabling achievement of high aperture ratio.

Array substrate comprising semiconductor contact layers having same

Array substrate for display device and manufacturing method thereof

Array substrate for displaying device with capacitor lines having

Array substrate with bus lines takeout/terminal sections having multiple

Growing community of inventors

Tokyo, Japan

Tamio Nakai