Renesas Technology Corp.

Other

Hitachi Ulsi Systems Co., Ltd.

Renesas Electronics Corporation

Hitachi, Ltd.

Sony Kabushiki Kaisha

Hitachi Vlsi Engineering Corp.

Elpida Memory, Inc.

Renesas Technologies Corporation

Hitachi Ltd., and Hitachi Vlsi Engineering Corp.

Tamaki Wada

Hirotaka Nishizawa

Masachika Masuda

Michiaki Sugiyama

Kenji Osawa

Junichiro Osako

Akira Higuchi

Takashi Totsuka

Toshio Sugano

Yasushi Takahashi

Masayasu Kawamura

Kazunori Furusawa

Haruji Ishihara

Kazuo Yoshizaki

Satoshi Hatakeyama

Kouichi Kanemoto

Keiichi Tsutsui

Yoshitaka Aoki

Akihiko Iwaya

Hideo Koike

Tomoko Higashino

Kenichi Imura

Atsushi Fujishima

Yuichi Morinaga

Yoichi Kawata

Takahiro Osawa

Hiroshi Ono

Takafumi Nishita

Kenji Oyachi

Nobuyasu Muto

Naoki Kawanabe

Akihiro Tobita

Hiroshi Ohno

Seiichi Ichihara

Kazuki Sakuma

Mikako Kimura

Asao Nishimura

Kunihiko Nishi

Kunihiro Tsubosaki

Kazunari Suzuki

Tomoaki Kudaishi

Takayuki Okinaga

Takashi Emata

Mikako Ujiie

Koich Iro Kagaya

Shuichiro Azuma

Kazuya Tsuboi

Yoshiyuki Tanigawa

Reliability of a semiconductor device is improved. A semiconductor device has a base material of insulating material having a through hole, a terminal formed on a lower surface of the base material, and a semiconductor chip mounted on an upper surface of the base material in a face-up manner. The semiconductor device has a conductive member such as a wire, which electrically connects a pad of the semiconductor chip with an exposed surface of the terminal which is exposed from the through hole of the base material, and has a sealing body for sealing the conductive member, inside of the through hole of the base material, and the semiconductor chip. An anchor is provided in a region of the exposed surface of the terminal which is exposed from the through hole of the base material except for a joint portion joined with the conductive member.

Semiconductor device

Reliability of a semiconductor device is improved. A semiconductor device has a base material comprised of insulating material having a through hole, a terminal formed on a lower surface of the base material, and a semiconductor chip mounted on an upper surface of the base material in a face-up manner. Further, the semiconductor device has a conductive member such as a wire, which electrically connects a pad of the semiconductor chip with an exposed surface of the terminal which is exposed from the through hole of the base material, and has a sealing body for sealing the conductive member, inside of the through hole of the base material, and the semiconductor chip. An anchor means is provided in a region of the exposed surface of the terminal which is exposed from the through hole of the base material except for a joint portion joined with the conductive member such as the wire.

To provide a semiconductor device having an improved quality. The semiconductor device of the invention has a tape substrate having a semiconductor chip thereon, a plurality of land pads placed around the semiconductor chip, a plurality of wires for electrically coupling the electrode pad of the semiconductor chip to the land pad, and a plurality of terminal portions provided on the lower surface of the tape substrate. An average distance between local peaks of the surface roughness of a first region between the land pad of the tape substrate and the semiconductor chip is smaller than an average distance of local peaks of the surface roughness of a second region between the land pad of the tape substrate and the first region.

Method of manufacturing semiconductor device

A semiconductor device has a conductive member coupled to the surface of a bonding pad exposed from an opening formed in a passivation film. A second planar distance between a first end of an electrode layer and a first end of a bonding pad is greater than a first planar distance between the first end of the electrode layer and a first end of an opening. Since the second planar distance between the first end of the electrode layer and the first end of the bonding pad is long, even when a coupled position of wire is deviated to the first end side of the electrode layer, stress caused by coupling of the wire to a stepped portion of the electrode layer can be prevented from being transmitted to the first end portion of the bonding pad.

Semiconductor device having electrode/film opening edge spacing smaller than bonding pad/electrode edge spacing

The degree of freedom of the chip layout in a semiconductor device is improved, and improvement in packaging density is aimed at. Since it becomes possible to form the wire of two directions on the pad of a memory chip by performing the over-bonding of reverse bonding by ball bonding, an effect equivalent to continuation stitch bonding of wedge bonding can be produced by ball bonding. Hereby, the degree of freedom of a chip layout and the degree of freedom of the lead layout of substratecan be improved, and the packaging density on a substrate in a chip lamination type semiconductor device (memory card) can be improved.

Semiconductor device and a manufacturing method of the same

In connection with a semiconductor device in which a conductive member is coupled to the surface of a bonding pad exposed from an opening formed in a passivation film, there is provided a technique able to suppress the occurrence of a crack in the passivation film. A second planar distance between a first end of an electrode layer and a first end of a pad is greater than a first planar distance between the first end of the electrode layer and a first end of an opening. Since the second planar distance between the first end of the electrode layer and the first end of the pad is long, even when a coupled position of wire is deviated to the first end side of the electrode layer, stress caused by coupling of the wire to a stepped portion of the electrode layer can be prevented from being transmitted to the first end portion of the pad.

The present invention provides a memory card equipped with an interface controller connected to external connecting terminals, a memory connected to the interface controller, and a security controller connected to the interface controller. A second external connecting terminal capable of supplying an operating power supply to the security controller is provided aside from a first external connecting terminal which supplies an operating power supply to the interface controller and the memory. An interface unit of the interface controller connected to the security controller receives the operating power supply from the second external connecting terminal and thereby enables a stop of the supply of the operating power supply from the first external connecting terminal. Even if the supply of the operating power supply to the interface controller is cut off, the output of the interface unit is not brought to an indefinite state.

Memory card

A multifunction card device has an external connection terminal, an interface controller, a memory, and the security controller connected to the interface controller and the external connection terminal. The interface controller has a plurality of interface control modes, and controls an external-interface action and a memory interface action by the control mode according to the instruction from the outside. The external connection terminals have an individual terminal individualized for every interface control mode, and a communalized common terminal. A clock input terminal, a power supply terminal, and an earthing terminal are included in the common terminals. A data terminal, and a dedicated terminal of the security controller are included in the individual terminals. Partial communalization and individualization of an external connection terminal attain a guarantee of the reliability of an interface, and increase control of physical magnitude to some kinds of interface control modes. The security process by a security controller independent interface can also be guaranteed.

Multi-function card device

An antenna connection function for a noncontact interface is provided by suppressing a modification in a pin arrangement and a pin shape of a memory card that does not correspond to the noncontact interface. Two antenna connecting pins having the memory card are divided into two areas in which a size of one potential supply pin is the largest and used as a split pin arranged at intervals. Because a size of the two antenna connecting pins is at maximum as large as the size of the potential supply pin, the two antenna connecting pins are provided and the memory card that corresponds to the noncontact interface is obtained by devoting a pin area having the size of the one potential supply pin to the memory card that does not correspond to the noncontact interface. Accordingly, the pin area of the memory card that corresponds to the noncontact interface can be formed without departing from the pin area of the memory card that does not correspond to the noncontact interface.

Memory card and semiconductor device

To realize compatibility with an SIM card and adaptation to a high-speed memory access in an IC card module having a microcomputer and a memory card controller. An IC card module includes a plurality of first external connecting terminals and a plurality of second external connecting terminals both exposed to one surface of a card substrate, a microcomputer connected to the first external connecting terminals, a memory controller connected to the second external connecting terminals, and a volatile memory connected to the memory controller. The shape of the card substrate and the layout of the first external connecting terminals are based on a standard of plug-in UICC of ETSI TS 102 221 V4.4.0 (2001-10) or have compatibility. The second external connecting terminals are disposed outside the minimum range of the terminal layout based on the standard for the first external connecting terminals. The first and second external connecting terminals respectively include signal terminals electrically separated from one another.

IC card module

A process yield of a semiconductor device is enhanced. To that end, there is provided a semiconductor device comprising a substrate having a component mount face with semiconductor chips mounted thereon, the substrate being provided with a plurality of connection leads, and a cap made of resin, placed over the component mount face of the substrate so as to cover the same, the a cap having a first body part, and a second body part larger in thickness than the first body part. Because product information in the form of inscriptions is engraved on the top surface side of the second body part of the cap, the product information can be displayed without the use of an ink mark, it is possible to prevent occurrence of marking defects due to ink bleed, and so forth, thereby enhancing the process yield of a memory card (the semiconductor device).

Semiconductor device and method for manufacturing same

A semiconductor device includes external interface terminals and processing circuits, and it is fed with an operating power source when detachably set in a host equipment. Power source feeding terminals (VCC, VSS) among the external interface terminals are long enough to keep touching the corresponding terminals of the host equipment for, at least, a predetermined time period since the separation of an extraction detecting terminal among the external interface terminals, from the corresponding terminal of the host equipment, and they are formed to be longer in the extraction direction of the semiconductor device than the extraction detecting terminal. Thus, a time period till the cutoff of the power source is easily made comparatively long. The power source feeding terminals should preferably be extended onto the insertion side of the semiconductor device, but an extendible distance is sometimes liable to be limited. In order to ensure the necessary time period without changing the length and shape of the power source feeding terminals on the semiconductor device side, each of the power source feeding terminals may be formed so as to have two, front and rear touch points with the corresponding connector terminal of the host equipment side, but complicated improvements are necessitated for the construction of the connector terminal of the host equipment side. According to the semiconductor device, the time period required till the power source cutoff is easily ensured, and the complicated improvements are not required for the construction of the corresponding connector terminals of the host equipment side.

Semiconductor device with power source feeding terminals of increased length

A semiconductor device includes external interface terminals and processing circuits, and it is fed with an operating power source when detachably set in a host equipment. Power source feeding terminals (VCC, VSS) among the external interface terminals are long enough to keep touching the corresponding terminals of the host equipment for, at least, a predetermined time period since the separation of an extraction detecting terminal among the external interface terminals, from the corresponding terminal of the host equipment, and they are formed to be longer in the extraction direction of the semiconductor device than the extraction detecting terminal. The processing circuits include an interface control circuit () which is connected to the external interface terminals, and a rewritable nonvolatile memory () which is controlled by the interface control circuit. The nonvolatile memory stores information on the basis of the difference of the threshold voltages of memory cells. The interface control circuit causes a storage area midway of a threshold voltage initialization process to complete a process in which the threshold voltages of the memory cells are uniformalized into a predetermined threshold voltage distribution, before the power source is cut off after the separation of the extraction detecting terminal from the corresponding terminal of the host equipment.

A semiconductor device includes external interface terminals and processing circuits, and it is fed with an operating power source when detachably set in a host equipment. Power source feeding terminals (VCC, VSS) among the external interface terminals are long enough to keep touching the corresponding terminals of the host equipment for, at least, a predetermined time period since the separation of an extraction detecting terminal among the external interface terminals, from the corresponding terminal of the host equipment, and they are formed to be longer in the extraction direction of the semiconductor device than the extraction detecting terminal. These power source feeding terminals are a power source terminal and a ground terminal, and any power source compensating capacitor is not connected between the power source terminal and the ground terminal. Since a time period required till the cutoff of the power source can be easily ensured, a capacitor for compensating the operating power source at the power source cutoff which occurs midway of an operation is not necessitated.

Growing community of inventors

Higashimurayama, Japan

Tamaki Wada