Sandisk Technologies Inc.

Takuya Sakurai

Yoshitaka Otsu

Atsushi Shimoda

Toshiya Yokota

A semiconductor device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate including a semiconductor material layer, a memory opening and a support opening extending through the alternating stack, a memory opening fill structure located in the memory opening and including a memory film and a semiconductor material portion in contact with the semiconductor material layer, and a support pillar structure located in the support opening. The support pillar structure lacks a semiconductor material portion which is in contact with the semiconductor material layer.

Multi-tier three-dimensional memory device with dielectric support pillars and methods for making the same

A method of forming a NAND flash memory includes anisotropically etching trenches of a gate stack down to an intermediate level in a floating gate polysilicon layer, leaving remaining portions of the floating gate polysilicon over the gate dielectric layer. Subsequently, forming a protective layer along exposed sides of the trenches. Then, electrically separating individual floating gates by a selective process that is directed to the remaining portions of the floating gate polysilicon layer exposed by trenches.

Floating gate separation in NAND flash memory

Sidewall spacers formed on sides of mandrels are separated by first gaps in a first region and separated by wider second gaps in a second region. The second gaps are filled while a capping layer caps the first gaps. The capping layer is etched thereby exposing mandrels in the first region, which are removed. An underlying layer is patterned using the sidewall spacers separated by first gaps to form word lines in the first region and using sidewall spacers with filled second gaps to form select lines in the second region.

Growing community of inventors

Yokkaichi, Japan

Takuya Sakurai