Matsushita Electric Industrial Co., Ltd.

Takuya Jinbo

Toshiyuki Araki

Masaki Toyokura

Kiyoshi Okamoto

In an animation encoding process, a motion vector which can minimize an AC component included in a discrete cosine transform result is detected. For this purpose, a block X (i, j) to be processed is extracted from an input image X, and a prospective reference block Y,(i, J) is extracted from a reference image Y, wherein k is an integer depending upon the size of a motion vector search range, i&equals;0, . . . , or 3, and j&equals;0, . . . , or 63. From each pixel value in each sub block (including 8&times;8 pixels) of the block to be processed, an average value X,(i) of pixels in the sub block is subtracted, and from each pixel value in each sub block (including 8&times;8 pixels) of the prospective reference block, an average value Y,(i) of pixels in the sub block is subtracted. Then, an evaluation value S,for block matching is calculated. The prospective reference block having the minimum evaluation value is selected as a reference block among the plural prospective reference blocks, so as to obtain a motion vector V corresponding to the positional relationship between the block to be processed and the reference block.

Motion vector detecting circuit

In an IDCT circuit, a first RAC and a second RAC each have a ROM for sequentially generating a plurality of partial products and an accumulator for performing a digit-adjustment accumulation of the generated partial products while truncating the LSB of an intermediate accumulation result for every cycle. The first RAC further has a carry bit generator for holding a carry bit of one cycle before and for generating a carry bit of a current cycle by performing a majority arithmetic operation of the LSB of an intermediate accumulation result of the first RAC, the LSB of an intermediate accumulation result of the second RAC and the one-cycle-before carry bit. The second RAC further has a borrow bit generator for holding a borrow bit of one cycle before and for generating a borrow bit of a current cycle by performing a majority arithmetic operation of the LSB of an intermediate accumulation result of the first RAC, an inverted bit of the LSB of an intermediate accumulation result of the second RAC and the one-cycle-before borrow bit. A final accumulation result of the first RAC, a final accumulation result of the second RAC, a final carry bit and a final borrow bit are used in butterfly arithmetic operations.

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Osaka, Japan

Takuya Jinbo