Denso Corporation

So-ken Corporation

Takuya Honda

Hirofumi Isomura

Tomohisa Kishigami

Hiroyuki Mori

Takuya Harada

Nobuyuki Tanaka

Masakiyo Horie

Yuki Horii

Yasuhiro Mori

A ringing suppression circuit is provided at one or more nodes each having a communication circuit executing communication with another node by transmitting a differential signal through a pair of communication lines connected to the nodes. The circuit includes a suppression circuit and an operation mode controller: The suppression circuit is configured to execute a suppression operation for suppressing ringing in the differential signal. The operation mode controller is configured to set an operation mode of the suppression circuit to one of: a normal operation mode, which enables the suppression circuit to execute the suppression operation in response to detecting a change in a level of the differential signal, and a permanent off mode, which disables the suppression circuit to execute the suppression operation on a steady basis.

Ringing suppression circuit

A ringing suppression circuit connected to a transmission line to suppress ringing caused by the transmission line transmitting a differential signal using a pair of signal lines, the differential signal varying between a high level and a low level, the pair of signal lines including a high potential signal line and a low potential signal line, the ringing suppression circuit including: an inter-line switching element that is connected between the pair of signal lines; a control portion that performs a ringing suppression operation in response to detecting a level change in the differential signal, wherein the ringing suppression operation turns on the inter-line switching element to decrease an impedance between the pair of signal lines; and a suppression operation prohibiting portion that prohibits the control portion from performing the ringing suppression operation in response to detecting a signal caused by a signal on the transmission line.

Ringing suppression circuit and ringing suppression method

A ringing suppression circuit is provided at a node having a communication circuit executing communication with another node by transmitting a differential signal through a pair of communication lines. The ringing suppression circuit includes: a suppressor configured to perform a suppression operation to suppress ringing occurred with a transmission of the differential signal by connecting a resistive component between the pair of communication lines; and a reference potential provider configured to provide a reference potential, which corresponds to a midpoint potential of the pair of communication lines during a steady state, to an intermediate point of the resistive component.

A communication node is connected to a transmission line which transmits a differential signal changeable between a high level and a low level and has a high potential signal line and a low potential signal line as a pair of signal lines. The communication node includes: an inter-line potential detector that detects an intermediate potential between the pair of signal lines; a node potential detector that detects an intermediate potential of an operation power source voltage which is supplied to the communication node; and a voltage adjuster that detects a difference between the intermediate potential detected by the inter-line potential detector and the intermediate potential detected by the node potential detector, and adjusts the operation power source voltage in accordance with the difference.

Communication node

A ringing suppression circuit, which is connected to a transmission line for transmitting a differential signal changeable between a high level and a low level in a binary level through a pair of a high potential side signal line and a low potential side signal line, and suppresses ringing that occurs in association with transmission of the differential signal, includes: an inter-line switching element that is connected to the pair of the high potential side signal line and the low potential side signal line; and a control unit that turns on the inter-line switching element and fixes an on state when detecting that the differential signal changes from the high level to the low level, and releases the on state after a predetermined time is measured and elapsed.

A ringing suppression circuit includes: a single line switching element, which is driven by a voltage, that is connected between a pair of signal lines; a controller that detects a change in a level of the differential signal and turns on the single line switching element to lower an impedance between the pair of signal lines; a period detector that detects a length of a suppressing period indicated by a setting signal, which is an input; and a suppressing period storage that stores the length of the suppressing period which is detected by the period detector. In addition, the pair of signal lines includes a high potential signal line and a low potential signal line. Moreover, the controller turns on the single line switching element for only the suppressing period having the length, which is stored in the suppressing period storage.

An input part is supplied with a low voltage from a low voltage power supply line. A level shift part and an output part are supplied with a high voltage from a high voltage power supply line. An input terminal is pulled up by a resistor and connected to the level shift part through a buffer circuit and an inverter circuit. The level shift part is connected in series with an NMOS and turned on when the input terminal changes to a low level. The output terminal is pulled up by a resistor through the buffer circuit. Even when the level shift part operates unstably because of long delay time from rising of a potential of the high voltage power supply line to rising of a potential of the low voltage power supply line, the output voltage is maintained at a high level.

Level shift circuit

An input signal processing device includes an oscillator circuit, a signal processing circuit, and a control circuit. The oscillator circuit performs an oscillation operation to output a clock signal. The signal processing circuit operates based on the clock signal outputted from the oscillator circuit. The signal processing circuit performs a predetermined process to an input signal when a level of the input signal changes and outputs a signal after the predetermined process. The control circuit instructs the oscillator circuit to start the oscillation operation based on a level change of the input signal. The control circuit instructs the oscillator circuit to stop the oscillation operation when the signal processing circuit finishes the predetermined process.

Input signal processing device

A serial communication circuit for performing full duplex serial communication with a microcomputer includes a counter and a timer. The counter is incremented by each pulse of a serial clock signal output from the microcomputer. When the counter reaches the number of bits of serial data output from the microcomputer, the counter outputs a load signal to a receiving register. The timer starts to count after the counter outputs the receiving load signal for the first time and continues to count during the serial communication. The timer expires at a predetermined time interval. Each time the timer expires, the timer outputs a timer signal. In response to the timer signal, a synchronous signal is output to the microcomputer, the counter is cleared to zero, and data to be output to the microcomputer is loaded into a sending register.

Serial communication circuit and A/D conversion system having the same

An output data correction device is provided for an A/D conversion circuit that achieves high precision over input voltage domains. An estimated maximum input ranging from 0 V to 5 V is divided into domains. A comparison circuit decides to which of the domains a voltage Vin input to a pulse phase-difference encoding circuit belongs. Control logic and a digital analog controller (DAC) select and transmit reference voltages associated with each of the domains. When each of the reference voltages is selected, a quadratic functional equation is computed and determined. A graph of the function passes coordinate points representing the reference voltages in a coordinate system with reference voltages and A/D-converted data values as dimensions. When each input voltage is selected, the A/D-converted digital data is corrected using the quadratic functional equation associated with the domain to which the input voltage Vin is decided to belong.

Output data correction device for analog-to-digital conversion circuit and analog-to-digital converted output data correction method

The A/D converter has first and second PPDC circuits (pulse-phase-difference coding circuits). The first PPDC circuit performs A/D conversions on the reference voltage and on the voltage signal amplified by an amplifier in an alternating sequence, the amplifier using the reference voltage as a potential base thereof. The second PPDC circuit performs A/D conversions always on the reference voltage. The A/D-converted data set of the voltage signal outputted from the first PPDC circuit is corrected depending on the difference between the A/D-converted data set of the reference voltage outputted from the second PPDC circuit when the first PPDC circuit A/D-converts the reference voltage and the A/D-converted data set of the reference voltage outputted from the second PPDC circuit when the first PPDC circuit A/D-converts the voltage signal.

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Kariya, Japan

Takuya Honda