Semiconductor Energy Laboratory Co., Ltd.

Takuro Ohmaru

Naoto Kusumoto

Seiichi Yoneda

Yoshiaki Ito

Masami Endo

Hidetomo Kobayashi

Kentaro Hayashi

Shunpei Yamazaki

Hajime Kimura

Yutaka Shionoiri

Yuki Okamoto

Naoaki Tsutsui

Yoshiyuki Kurokawa

Kiyoshi Kato

Hiroki Inoue

Wataru Uesugi

Yasuyuki Takahashi

Jun Koyama

Atsuo Isobe

Tatsuji Nishijima

Yukio Maehashi

Shuhei Nagatsuka

Tomoaki Atsumi

Hikaru Tamura

Koichiro Kamata

Takahiko Ishizu

Masato Ishii

Masashi Fujita

Satoshi Shinohara

An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.

Imaging device, operating method thereof, and electronic device

A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

Semiconductor device including photoelectric conversion element

An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A node AN (a first charge retention portion), a node FD (a second charge retention portion), and a node FDX (the charge detection portion) are provided. Imaging data obtained in the node AN is transferred to the node FD, and the imaging data is sequentially transferred from the node FD to the node FDX to be read.

Imaging device, module, and electronic device comprising a pixel including transistors using back gate electrical connections

Method of operating an imaging device with global shutter system

An imaging device that has a high degree of freedom for exposure time and is capable of taking an image with little distortion is provided. In an n-th frame period where n is a natural number of two or more, a potential of a first charge accumulation portion is reset; the first charge accumulation portion is charged with a potential in accordance with an output of a photoelectric conversion element and simultaneously, imaging data in the (n&#x2212;1)-th frame that is output in accordance with a potential of a second charge accumulation portion is read; a potential of the second charge accumulation portion is reset; a potential of the first charge accumulation portion is transferred to the second charge accumulation portion, and a potential of the second charge accumulation portion is held. Through the steps, the degree of freedom for an exposure period is increased.

Imaging device comprising n-channel oxide semiconductor transistors, photoelectric conversion element, and capacitor

To provide a novel semiconductor device, a semiconductor device capable of operating at a high speed, or a semiconductor device with reduced area, or a semiconductor device with low power consumption. The semiconductor device which has a function of taking a moving image includes a pixel portion including a plurality of pixels, a first circuit, and a second circuit. Each of the plurality of pixels has a function of converting irradiation light to generate first data and a function of generating second data corresponding to a difference between the first data in a first frame period and the first data in a second frame period. The first circuit has a function of converting the second data into a digital signal and outputting the digital signal as compressed data of the moving image. The second circuit has a function of controlling output of the compressed data.

Semiconductor device, imaging system, and electronic device

An imaging device whose dynamic range is broadened is provided. The imaging device includes a pixel including a first photoelectric conversion element and a first circuit including a second photoelectric conversion element. The first circuit switches the operation mode of the pixel to a normal imaging mode or a wide dynamic range mode and switches the operation region of the first photoelectric conversion element to a normal region or an avalanche region in accordance with the illuminance of light with which the second photoelectric conversion element is irradiated. When the illuminance of light with which the first photoelectric conversion element is irradiated is increased, the increase rate of a writing current flowing to the pixel is higher in the avalanche region than in the normal region. However, in the wide dynamic range mode, the increase rate of current can be lowered, and thus the dynamic range can be broadened.

Imaging device comprising photoelectric conversion element, operating method thereof, and electronic device

An imaging device capable of obtaining high-quality imaging data is provided. The imaging device can correct variation in the threshold voltage of amplifier transistors included in pixel circuits. The amplifier transistor includes two gates facing each other with a channel formation region provided therebetween. The amplifier transistor operates in such a manner that one of the gates holds a potential for correcting variation in the threshold voltage and the other thereof is supplied with a potential corresponding to imaging data.

Imaging device and electronic device

An imaging device with high productivity and improved dynamic range is provided. The imaging device includes a pixel driver circuit and a photoelectric conversion element including a p-type semiconductor, an n-type semiconductor, and an i-type semiconductor. In a plan view, the total area of a part of the i-type semiconductor overlapped with neither a metal material nor a semiconductor material constituting the pixel driver circuit is preferably greater than or equal to 65%, more preferably greater than or equal to 80%, and still more preferably greater than or equal to 90% of the area of the whole i-type semiconductor. Plural photoelectric conversion elements are provided in the same semiconductor, whereby a process for separating the photoelectric conversion elements can be omitted. The i-type semiconductors in the plural photoelectric conversion elements are separated from each other by the p-type semiconductor or the n-type semiconductor.

To provide a memory device with short overhead time and a semiconductor device including the memory device. A memory device includes a first circuit that can retain data and a second circuit by the supply of power supply voltage. The second circuit includes a third circuit that selects a first potential corresponding to the data or a second potential supplied to a first wiring; a first transistor having a channel formation region in an oxide semiconductor film; a capacitor that hold the first potential or the second potential that is selected by the third circuit and supplied through the first transistor; and a second transistor controlling a conduction state between the first circuit and a second wiring that can supply a third potential in accordance with the potential retained in the capacitor.

Memory device including memory circuit and selection circuit

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Kanagawa, Japan

Takuro Ohmaru