Mitsubishi Electric Corporation

Takuro Mori

Takamasa Oda

Yoshitaka Otsubo

Seiji Saiki

Masaru Furukawa

Hideki Tsukamoto

Hayato Nagamizu

Masayuki Ando

Korehide Okamoto

Takeshi Ogawa

Kota Ohara

Yosuke Miyagi

Provided are a semiconductor device and an inverter device with a decrease in yield being suppressed by preventing the adhesive from leaking into the inside of the semiconductor device. A heat sink, a wiring board provided on the heat sink, a semiconductor chip provided on the wiring board, a case housing provided on the heat sink so as to surround the wiring board and the semiconductor chip, an adhesive that adheres a lower surface joint portion of the case housing and an upper surface joint portion of the heat sink, a sealing material that fills the case housing and covers the wiring board and the semiconductor chip, and a convex portion provided on the lower surface joint portion of the case housing or the upper surface joint portion of the heat sink, that separates the adhesive from the sealing material are included.

Semiconductor device and inverter device

An object of the present disclosure is to provide a technique capable of relaxing the stress to be applied around the attachment hole of the resin case at the time of fixing the resin case accommodating the semiconductor element to the heat dissipation component with a bolt. A semiconductor device includes a base plate, a heat dissipation component, and a resin case. In a state where the resin case is disposed on the heat dissipation component via the base plate, the resin case is attached to the heat dissipation component with a bolt. The resin case has a recess portion, an attachment hole formed below the recess portion, and at least one groove formed between a wall portion on an inner peripheral side forming the recess portion and the attachment hole. One end of the at least one groove reaches an outer peripheral end of the resin case.

Semiconductor device including resin case having groove at corner thereof

The semiconductor device includes a semiconductor element, a plurality of terminal electrodes, internal wiring, and a sealing material. The semiconductor element is mounted on a circuit pattern provided on an insulating substrate. The plurality of terminal electrodes are provided on a case in which the insulating substrate and the semiconductor element are contained. The internal wiring connects the semiconductor element and the plurality of terminal electrodes. The sealing material fills a space in the case. The internal wiring includes a plurality of circuit patterns, a plurality of metal blocks, and metal wire. The plurality of metal blocks are electrically connected to the respective circuit patterns. The metal wire connects the plurality of metal blocks and is bonded to the plurality of metal blocks at positions closer to an upper surface of the sealing material than surfaces of the plurality of circuit patterns.

Semiconductor device having metal wire bonded to plural metal blocks connected to respective circuit patterns

A semiconductor package includes: an insulating substrate having a circuit pattern; a semiconductor device provided on the circuit pattern; a case surrounding the semiconductor device on the insulating substrate; an external terminal electrically connecting inside and outside of the case; an inner wire electrically connecting the circuit pattern or the semiconductor device with an inner end portion of the external terminal; a sealing resin sealing the semiconductor device and the inner wire inside the case; and a lid covering an upper surface of the sealing resin, wherein the inner wire includes a fusion portion that fuses when excessive current flows, and the lid includes a scattering prevention part covering the fusion portion while securing a gap between the scattering prevention part and the upper surface of the sealing resin, and is fixed to the upper surface of the sealing resin in a region other than the scattering prevention part.

Semiconductor package

A semiconductor device includes: a base plate; an insulating substrate provided on an upper surface of the base plate; a conductive pattern provided on an upper surface of the insulating substrate; a semiconductor chip mounted on an upper surface of the conductive pattern; a case surrounding the base plate, the insulating substrate, the conductive pattern, and the semiconductor chip; a sealing resin sealing an interior of the case; and an external connection terminal provided to the case. One end portion of the external connection terminal is connected to the conductive pattern, the case has a terminal insertion portion enabling insertion of the other end portion of the external connection terminal in a peripheral wall portion thereof, and a portion of the external connection terminal other than the other end portion is sealed by the sealing resin with the other end portion being inserted in the terminal insertion portion.

Case having terminal insertion portion for an external connection terminal

In a semiconductor device, an outer peripheral case body has guiding portions formed therein as a plurality of recesses. The plurality of guiding portions each include an upper end opening. The outer peripheral case body has inner peripheral side openings formed in its inner peripheral surface, each of which is continuous with the upper end opening, extends from an upper end face toward a base body and is continuous with the guiding portion. The first insertion portion is inserted into a first guiding portion of the plurality of guiding portions. The first external terminal portion is continuous with the first insertion portion and extends through the upper end opening in the first guiding portion to outside of the outer peripheral case body. The first connection terminal portion is continuous with the first insertion portion and connected to a conductive pattern through the inner peripheral side opening.

Growing community of inventors

Fukuoka, Japan

Takuro Mori