Renesas Electronics Corporation

Nec Corporation

Nec Electronics Corporation

Takuo Funaya

Shintaro Yamamichi

Hideya Murai

Takehiko Maeda

Katsumi Kikuchi

Takayuki Igarashi

Hirokazu Honda

Kentaro Mori

Koji Matsui

Tadanori Shimoto

Kenta Ogawa

Hiromi Shigihara

Jun Tsukano

Hisao Shigihara

Masaya Kawano

Naoji Senba

Kouji Matsui

Shinichi Miyazaki

Keiichiro Kata

Kazuhiro Baba

Daisuke Ohshima

Kouji Soejima

Takashi Miyazaki

Katsumi Maeda

Hideki Sasaki

Shinichi Uchida

Tomohiro Nishiyama

Kei Tanaka

Yasunori Tanaka

Yuichi Yoshida

Toshihiko Akiba

Hideaki Tsuchiya

Michinobu Tanioka

Osamu Myohga

Kenji Sakata

Hirokazu Nagase

Eiichi Fukiharu

Yoshiki Nakashima

Yuji Kayashima

Hiroki Shibuya

Manabu Okamoto

Kenichi Otake

Yuuji Kayashima

A reliability prediction method includes: calculating a change of each of a plurality of alloy phases at a bonding portion between an electrode pad and a bonding wire; setting a generation of a metal oxide phase caused by a corrosion reaction, based on an initial crack structure of the bonding portion; calculating an elastic strain energy at each of specified portions of the bonding portion; setting a progress of a crack, based on the elastic strain energy at each of the specified portions; and predicting a lifetime of the semiconductor device, based on a length of the crack due to the progress of the crack.

Method for predicting reliability of semiconductor device

There is a need to improve reliability of the semiconductor device. A semiconductor device includes a printed circuit board and a semiconductor chip mounted over the printed circuit board. The semiconductor chip includes a pad, an insulation film including an opening to expose part of the pad, and a pillar electrode formed over the pad exposed from the opening. The printed circuit board includes a terminal and a resist layer including an opening to expose part of the terminal. The pillar electrode of the semiconductor chip and the terminal of the printed circuit board are coupled via a solder layer. Thickness hof the pillar electrode is measured from the upper surface of the insulation film. Thickness hof the solder layer is measured from the upper surface of the resist layer. Thickness his greater than or equal to a half of thickness hand is smaller than or equal to thickness h.

Semiconductor device

Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CLand a wiring Mformed on an interlayer insulator IL, a wiring Mformed on an interlayer insulator IL, and a coil CLand a wiring Mformed on the interlayer insulator IL. Moreover, a distance DMbetween the coil CLand the wiring Mis longer than a distance DMbetween the coil CLand the wiring M(DM&#x3e;DM). Furthermore, the distance DMbetween the coil CLand the wiring Mis set to be longer than a sum of a film thickness of the interlayer insulator ILand a film thickness of the interlayer insulator IL, which are positioned between the coil CLand the coil CL. In this manner, it is possible to improve an insulation withstand voltage between the coil CLand the wiring Mor the like, where a high voltage difference tend to occur. Moreover, a transformer formation regionA and a seal ring formation regionC surrounding a peripheral circuit formation regionB are formed so as to improve the moisture resistance.

Semiconductor device with coils in different wiring layers

A semiconductor device includes a semiconductor substrate having a main surface, a first insulating film formed on the main surface, a first coil formed on the first insulating film, a second insulating film formed on the first coil and having a first main surface and first side surfaces continuous with the first main surface, a third insulating film formed on the first main surface of the second insulating film and having a second main surface and second side surfaces continuous with the second main surface, and a second coil formed on the second main surface of the third insulating film. The second insulating film and the third insulating film are formed as a laminated insulating film together. A thickness of the second coil is greater than a thickness of the first coil in a thickness direction of the semiconductor substrate.

Semiconductor device and method of manufacturing the same

A semiconductor device including: a semiconductor substrate; a first coil formed on the semiconductor substrate via a first insulation film; a second insulation film formed on the semiconductor substrate so as to cover the first insulation film and the first coil; a first pad formed on the second insulation film and disposed at a position not overlapped with the first coil in a planar view; a laminated insulation film formed on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; a second coil formed on the laminated insulation film and disposed above the first coil; and a first wiring formed on the laminated insulation film including an upper portion of the first pad exposed from the first opening, the first wiring being electrically connected to the first pad.

An electronic apparatus is provided which, even when the electronic apparatus configuring a node is implanted in the body of an object animal, makes the object animal hard to feel stress and can acquire effective data about the natural behavior and state of the object animal. As shown in FIG., a module unit and a battery are arranged separated from each other. That is, an electronic apparatus according to the present embodiment 1 adopts a case including a first capacity part and a second capacity part both arranged separated from each other to thereby accommodate the module unit in an internal space of the first capacity part and accommodate the battery in an internal space of the second capacity part.

Electronic apparatus and manufacturing method therefor

Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CLand a wiring Mformed on an interlayer insulator IL, a wiring Mformed on an interlayer insulator IL, and a coil CLand a wiring Mformed on the interlayer insulator IL. Moreover, a distance DMbetween the coil CLand the wiring Mis longer than a distance DMbetween the coil CLand the wiring M(DMDM). Furthermore, the distance DMbetween the coil CLand the wiring Mis set to be longer than a sum of a film thickness of the interlayer insulator ILand a film thickness of the interlayer insulator IL, which are positioned between the coil CLand the coil CL. In this manner, it is possible to improve an insulation withstand voltage between the coil CLand the wiring Mor the like, where a high voltage difference tend to occur. Moreover, a transformer formation regionA and a seal ring formation regionC surrounding a peripheral circuit formation regionB are formed so as to improve the moisture resistance.

Semiconductor device with inductively coupled coils

A semiconductor device includes a semiconductor substrate having a main surface; a first coil formed on the main surface; a first insulating film formed over the first coil and having a first main surface; a second insulating film formed on the first main surface of the first insulating film and having a second main surface; and a second coil formed on the second main surface of the second insulating film, wherein the first main surface of the first insulating film has a first area on which the second insulating film is formed, and has a second area without the first area in a plan view, and wherein the second insulating film is surrounded with the second area in the plane view.

A method of manufacturing a semiconductor device including: (a) forming a first insulation film on a semiconductor substrate; (b) forming a first coil on the first insulation film; (c) forming a second insulation film on the first insulation film so as to cover the first coil; (d) forming a first pad on the second insulation film at a position not overlapped with the first coil in a planar view; (e) forming a laminated insulation film on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; and (f) forming a second coil and a first wiring on the laminated insulation film, wherein the second coil is disposed above the first coil, the first coil and the second coil are not connected by a conductor but magnetically coupled to each other, the first wiring is formed from an upper portion of the first pad to an upper portion of the laminated insulation film and is electrically connected to the first pad, and the laminated insulation film includes a silicon oxide film, a silicon nitride film on the silicon oxide film, and a resin film on the silicon nitride film.

A coil CLis formed on a semiconductor substrate SB via a first insulation film, a second insulation film is formed so as to cover the first insulation film and the coil CL, and a pad PDis formed on the second insulation film. A laminated film LF having an opening OPfrom which the pad PDis partially exposed is formed on the second insulation film, and a coil CLis formed on the laminated insulation film. The coil CLis disposed above the coil CL, and the coil CLand the coil CLare magnetically coupled to each other. The laminated film LF is composed of a silicon oxide film LF, a silicon nitride film LFthereon, and a resin film LFthereon.

On a semiconductor substrate, coils CLand CLand pads PD, PD, and PDare formed. The coil CLand the coil CLare electrically connected in series between the pad PDand the pad PD, and the pad PDis electrically connected between the coil CLand the coil CL. The coil magnetically coupled to the coil CLis formed just below the coil CL, the coil magnetically coupled to the coil CLis formed just below the coil CL, and they are connected in series. When a current is flowed in the coils connected in series formed just below the coils CLand CL, directions of induction current flowing in the coils CLand CLare opposed to each other in the coils CLand CL

Provided is a semiconductor device having improved reliability. Over a semiconductor substrate, a first coil is formed via a first insulating film. A second insulating film is formed so as to cover the first insulating film and the first coil. Over the second insulating film, a pad is formed. Over the second insulating film, a multi-layer film having an opening exposing a part of the pad is formed. Over the multi-layer insulating film, a second coil is formed. The second coil is placed over the first coil. The second and first coils are magnetically coupled to each other. The multi-layer film includes a silicon dioxide film, a silicon nitride film over the silicon dioxide film, and a resin film over the silicon nitride film.

Method of manufacturing semiconductor device

A semiconductor device including a semiconductor substrate having a main surface; a first insulating layer formed on the main surface and having a first main surface, the first main surface including a first region and a second region without the first area; a first coil formed on the first region of the first insulating layer; a plurality of first wirings formed on the second region of the first insulating layer; a second insulating layer formed on the first coil and on the first wirings, the second insulating layer having a second main surface; a third insulating layer formed on the second main surface above the first region of the first insulating layer and having a third main surface; and a second coil formed on the third main surface of the third insulating layer.

Characteristics of a semiconductor device are improved. A semiconductor device has a laminated insulating film formed above a lower-layer inductor. This laminated insulating film includes a first polyimide film, and a second polyimide film formed on the first polyimide film and having a second step between the first polyimide film and the second polyimide film. An upper-layer inductor is formed on the laminated insulating film. Since such a laminated structure of the first and second polyimide films is adopted, the film thickness of the insulating film between the lower-layer and upper-layer inductors can be increased, so that withstand voltage can be improved. Further, the occurrence of a depression or peeling-off due to defective exposure can be reduced, and step disconnection of a Cu (copper) seed layer or a plating defect due to the step disconnection can also be reduced.

Growing community of inventors

Tokyo, Japan

Takuo Funaya