Fujitsu Corporation

Takumi Maruyama

Shuji Yamamura

Masahiro Kuramoto

Noriyuki Yokoshi

Kiyoshi Sugita

Masato Nakagawa

Takashi Onodera

Atul Dhablania

Mitsunobu Yoshida

Yasuhiko Nakano

Kenichi Kawarai

Robert S Grondalski

Ryuji Kan

Hiroyuki Kaneko

Noriko Itani

Shigeki Itou

Naomi Yamazaki

Osamu Tsurumi

Ryoetsu Nakajima

Katsuhiko Nakamoto

Hiroaki Uno

Makoto Komagata

Nobuko Hatakenaka

A processor includes: an address generating unit that, when an instruction decoded by a decoding unit is an instruction to execute arithmetic processing on a plurality of operand sets each including a plurality of operands that are objects of the arithmetic processing, in parallel a plurality of times, generates an address set corresponding to each of the operand sets of the arithmetic processing for each time, based on a certain address displacement with respect to the plurality of operands included in each of the operand sets; a plurality of instruction queues that hold the generated address sets corresponding to the respective operand sets, in correspondence to respective processing units; and a plurality of processing units that perform the arithmetic processing in parallel on the operand sets obtained based on the respective address sets outputted by the plurality of instruction queues.

Processor and control method of processor for address generating and address displacement

A plurality of floating-point registers store data therein. A processing execution unit executes arithmetic processing by using data stored in the floating-point registers. A first switch and a second switch select a route connecting the processing execution unit and the floating-point registers. A switch control unit controls the first switch and the second switch so as to switch a route to be selected, based on a switching instruction from the processing execution unit.

Arithmetic processing device and control method for arithmetic processing device

A data compression apparatus includes a memory and a processor. The processor extracts a second character string as a matching string from a character string after a first character string in a character string of data before compression that is stored in the memory, the second character string being identical with the first character string, and identifies a length of the matching string, and a relative position indicating how many addresses the first character string precedes the second character string by. The processor extracts a third character string having a length that is less than the relative position from the extracted second character string. The processor encodes a length of the third character string. The processor encodes the relative position.

Data compression apparatus and method

A packet multiplexing control method and equipment using the method are realized by a simple control method with reduced hardware, enabling to provide low cost, efficient and fair bandwidth control corresponding to traffic characteristic of users. The packet multiplexing control method includes the steps of extracting a header part in each packet data received from a plurality of terminals; learning an address in the extracted header part; and controlling either admission processing or discard processing of the received packet according to the result of learning the address.

Packet multiplexing control method and a concentrator using the same

A computer-implemented method and system for performing an arithmetic shift right by n of an m-bit negative number. A right shifter executes a logical shift right operation on the number to be shifted. A left shifter performs a left shift on an m-bit mask of ones, left shifting the mask by the one's complement of n. An OR operation is then performed on the results of the two shifting operations, producing the desired arithmetic shift right result.

Generation of sign extended shifted numerical values

A main controller of a recording medium dualization system reads, when the power is turned on, three types of information: USE information (status information of a recording medium of each medium board) indicating whether or not the medium can be used; ACT information indicating which of the recording mediums is or was used in an active system; and PWON information indicating whether or not the power for the recording medium is turned on, whereupon the main controller sets the information to denote that the master system is an active system and executes a mirroring process whereby the USE information and the PWON information of the slave system are identical to the master system. When it is found that the recording medium of the master system is removed, on the basis of the USE and ACT information, the slave system is switched to an active system, and the corresponding information setting is performed. When it is found that the recording medium of the master system is mounted, on the basis of the PWON information, the USE information and the PWON information of the slave system are mirrored onto the master system.

Recording medium dualizing system

A multi-CPU system including a fault monitoring facility comprises a plurality of central processing units interconnected through a system bus and sending and receiving data through a plurality of bus interface units inserted in the system bus. A fault monitoring bus in parallel with the system bus is commonly accessed by the bus interface units. A bus interface unit which detects a fault notifies the other bus interface units simultaneously using the fault monitoring bus. Data-originating interface units and data-destination interface units receive fault information of the location and type of fault, which has occurred. Swift recovery from a faulty state is enabled.

Multi-CPU system having fault monitoring facility

An apparatus for controlling synchronization in a system having at least first and second units each having internal circuits includes signal paths through which a control signal output from a second unit is sent to a first unit and a control signal output from the first unit is sent to the second unit. A first preparatory process part carries out a process to place the internal circuits of the second unit in an operating state when the second unit is connected to the system and for outputting a control signal to the signal paths. A first function mask control part is provided for stopping the operation of the internal circuits of the second unit when a control signal from the first unit is not received by the second unit, and for restarting the operation of the internal circuits when the control signal is received. A second preparatory process part carries out a process to place the internal circuits of the first unit in an operating state when the control signal from the second unit is received by the first unit, and for outputting a control signal to the signal paths. A second function mask control part is provided for stopping the operation of the internal circuits of the first unit when the control signal is not received, and for re-starting the operation of the internal circuits when the control signal is received.

Controlling synchronization in a system having a plurality of units when

A firmware trace data acquisition method is constituted such that there are provided a monitoring part for monitoring firmware processes and a DMA part for transferring data to a trace data storing part in accordance with an instruction from the monitoring part, such that labels are attached to the plurality of process modules stored in a firmware storing part, and such that each of the process modules activated notifies the monitoring part of the label attached to itself. The monitoring part latches the label that it is notified of and monitors the execution of the corresponding process such that, when an abnormality is detected during the execution, the monitoring part controls the DMA part so as to transfer detailed data, derived from the process module corresponding to the label latched, to the trace data storing part, and such that, when there is no abnormality detected, the monitoring part allows the DMA part to transfer the latched label to the trace data storing part.

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Yokohama, Japan

Takumi Maruyama