Rohm Co., Ltd.

University of Arkansas

Cree Fayetteville, Inc.

Arkansas Power Electronics International, Inc.

Takukazu Otsuka

Keiji Okumura

Masao Saito

Maiko Hatano

Katsuhiko Yoshihara

Seita Iwahashi

Tatsuya Miyazaki

Ryuta Watanabe

Atsushi Yamaguchi

Hirotaka Otake

Hiroyuki Sakairi

Alexander B Lostetter

Brandon Passmore

Yasuo Kanetake

Bryon Western

Yuta Okawauchi

Zach Cole

Jared Hornberger

Xiaopeng Wu

Brian Lynn Rowden

A semiconductor device includes a conductive member having an obverse face, a semiconductor element mounted on the obverse face, and a conductive bonding material disposed between the conductive member and the semiconductor element, to conductively bond the conductive member and the semiconductor element together. The conductive bonding material includes a metal base layer, a first bonding layer, and a second bonding layer. The first bonding layer is disposed between the metal base layer and the semiconductor element, and bonded to the semiconductor element by metal solid-phase diffusion. The second bonding layer is disposed between the metal base layer and the conductive member, and bonded to the conductive member by metal solid-phase diffusion.

Semiconductor device

A semiconductor device includes a first and a second switching element, a first and a second conductive member, and a capacitor. The first switching element has a first element obverse surface and a first element reverse surface facing away from each other in a first direction. The second switching element has a second element obverse surface and a second element reverse surface facing away from each other in the first direction. The first and second conductive members are spaced apart in a second direction orthogonal to the first direction. The capacitor has a first and a second connection terminal. The first and second switching elements are connected in series, forming a bridge. The first and second connection terminals are electrically connected to opposite ends of the bridge. The capacitor and the first switching element are on the first conductive member, the second switching element on the second conductive member.

Semiconductor device with switching elements connected in series

The power semiconductor apparatus includes: a semiconductor device; a bonding layer on chipdisposed on an upper surface of the semiconductor device; and a metal leaddisposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal leadhas a three-laminated structure including: a second metal layerhaving a CTE equal to or less than 5×10/° C., for example; and a first metal layerand a third metal layersandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

Power semiconductor apparatus and fabrication method for the same

Semiconductor device Aincludes: first terminalA and second terminalB; first switching elementA including first gate electrodeA, first source electrodeA and first drain electrodeA; and second switching elementB including second gate electrodeB, second source electrodeB and second drain electrodeB. First switching elementA and second switching elementB are connected in series to each other between first terminalA and second terminalB. Semiconductor device Aincludes first capacitorA connected in parallel to first switching elementA and second switching elementB between first terminalA and second terminalB. First switching elementA and second switching elementB are aligned in y direction. First capacitorA overlaps with at least one of first switching elementA and second switching elementB as viewed in z direction. These arrangements serve to suppress surge voltage.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

Semiconductor device and fabrication method of the semiconductor device

A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

Power module and fabrication method of the same, graphite plate, and power supply equipment

Semiconductor device (A) includes conductive substrate () and semiconductor element (). The conductive substrate () has obverse surface (A) facing in thickness direction (z) and reverse surface (B) facing opposite from the obverse surface (A). The semiconductor element () is electrically bonded to the obverse surface (A). The conductive substrate () includes first base layer (), second base layer () and metal layer (). The first base layer () and second base layer () are made of graphite composed of stacked graphenes. The metal layer () is between the first base layer () and the second base layer (). The graphenes of the first base layer () are stacked in first stacking direction perpendicular to the thickness direction (z). The graphenes of the second base layer () are stacked in second stacking direction perpendicular to the thickness direction (z) and crossing the first stacking direction.

The power semiconductor apparatus includes: a semiconductor device; a bonding layer on chipdisposed on an upper surface of the semiconductor device; and a metal leaddisposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal leadhas a three-laminated structure including: a second metal layerhaving a CTE equal to or less than 5&#xd7;10/&#xb0; C., for example; and a first metal layerand a third metal layersandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

A power module includes: a plate-shaped thick copper substrate, a conductive stress relaxation metal layer disposed on the thick copper substrate, a semiconductor device disposed on the stress relaxation metal layer, and a plated layer disposed on the stress relaxation metal layer, wherein the semiconductor device is bonded to the stress relaxation metal layer via the plated layer. The thick copper substrate includes a first thick copper layer and a second thick copper layer disposed on the first thick copper layer, and the stress relaxation metal layer is disposed on the second thick copper layer. A part of the semiconductor device is embedded to be fixed to the stress relaxation metal layer. A bonded surface between the semiconductor device and the stress relaxation metal layer are integrated to each other by means of diffusion bonding or solid phase diffusion bonding.

Growing community of inventors

Kyoto, Japan

Takukazu Otsuka