Nitto-denko Corporation

Dai Nippon Printing Co., Ltd.

Aquafairy Corporation

Takuji Okeyui

Kazuhito Hosokawa

Kazuhiro Ikemura

Keisuke Yoshikawa

Chikao Ikenaga

Masakazu Sugimoto

Yasushi Inoue

Kei Nakamura

Megumu Nagasawa

Kentarou Seki

Masachika Masuda

Hirofumi Fujii

Eiji Toyoda

Makoto Namikawa

You Shimazaki

Shinya Ota

Masaya Yano

Masayuki Kaneto

Yasuhiko Yamamoto

Yasuhik Yamamoto

Toshio Araki

A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.

Semiconductor device, substrate for producing semiconductor device and method of producing them

A semiconductor device P includes a die pad, a semiconductor elementwhich is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portionseach having a layered structure including a metal foilcomprising copper or a copper alloy, and electrically conductive portion plating layersprovided at both upper and lower ends of the metal foilare arranged around the die pad. The die padhas a lower die pad plating layer, and the semiconductor elementis loaded on the die padcomprising such a die pad plating layer. Electrodesprovided on the semiconductor elementare electrically connected with top ends of the electrically conductive portionsvia wires, respectively. The lower electrically conductive portion plating layersof the electrically conductive portionsand the die pad plating layerof the die padare exposed outside from the sealing resinon their back faces.

A substrate B for use in production of a semiconductor device is used, which substrate includes an adhesive sheethaving a base layerand an adhesive layer, and a plurality of independently provided electrically conductive portions. A semiconductor element having electrodesformed thereon is firmly fixed onto the substrate B, and upper portions of the plurality of electrically conductive portionsand the electrodesof the semiconductor elementare electrically connected by using wires. The semiconductor element, wiresand electrically conductive portionsare sealed by using a sealing resin. Each of the electrically conductive portionshas overhanging portions, and a side faceof the electrically conductive portionis roughened, thus enhancing the joining strength between each electrically conductive portionand the sealing resin

The present invention relates to and provides a fuel cell in which sealing can be reliably made for each unit cell, thereby, enabling thinning, facilitating maintenance, and enabling miniaturization and weight reduction, and enabling free shape design. A fuel cell of the present invention is characterized by comprising a sheet-like solid polymer electrolyteand a pair of electrode platesarranged on both sides of the solid polymer electrolyte, and further comprising a pair of metallic platesarranged on both sides of the electrode plates, and provided flow path grooves, and inletsand outlets communicating with the flow path grooves, wherein the peripheral edges of the metallic platesare mechanically sealed with an insulation materialinterposed between the metallic plates.

Fuel cell

A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive padson an adhesive layer included in an adhesive sheet, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheetwith surfaces thereof not provided with any electrodes in contact with the adhesive sheet, and electrically connecting electrodesformed on the semiconductor chipsand upper parts of the conductive padswith wires. The semiconductor chips, the wiresand the conductive padsare sealed in a sealing resin molding, and then the adhesive sheetis separated from the sealing resin molding. Each of the conductive padshas a reduced part, and a jutting partjutting out from the reduced part. The conductive padshaving such construction can be firmly bonded to the sealing resin molding

Semiconductor device fabricating apparatus and semiconductor device fabricating method

An epoxy resin composition for semiconductor encapsulation in producing surface mount lead-less thin semiconductor devices. The epoxy resin composition for surface mount lead-less semiconductor device encapsulation which device comprising an encapsulating resin layer and, encapsulated therein, a substrate, a semiconductor element mounted on the substrate, two or more conductive parts disposed around the semiconductor element, and wires which electrically connect electrodes of the semiconductor element to the conductive parts, wherein the bottom face of the substrate and the bottom face of each conductive part are exposed without being encapsulated in the encapsulating resin layer, and the epoxy resin composition used for forming the encapsulating resin layer has the following properties (&#x3b1;) and (&#x3b2;): (&#x3b1;) a melt viscosity of 2-10 Pa.s at 175&#xb0; C.; and (&#x3b2;) a flexural strength of cured state of 130 MPa or higher at ordinary temperature.

Epoxy resin composition for semiconductor encapsulation, semiconductor device using the same, and process for producing semiconductor device

A series of semiconductor devices includes: (i) a plurality of semiconductor elements having electrodes; (ii) a plurality of electrically conductive parts formed around and electrically connected to each of the semiconductor elements; and (iii) a sealing resin in which the plurality of semiconductor elements and the plurality of electrically conductive parts are sealed and an electrode-free side of each semiconductor element and an unwired side of each electrically conductive part are formed on a single flat surface of a removable substrate.

Method for manufacturing semiconductor device, adhesive sheet for use therein and semiconductor device

An adhesive film for manufacturing a semiconductor device comprising a thermosetting adhesive layer and a heat-resistant backing layer, wherein the adhesive film is applied to a method for manufacturing a semiconductor device, comprising the steps of (a) embedding at least a part of a conductor in the adhesive film to form a conductor adhered thereto; (b) mounting a semiconductor chip on the conductor; (c) connecting the semiconductor chip to the conductor; (d) encapsulating the semiconductor chip with an encapsulation resin; and (e) removing the adhesive film therefrom. The adhesive film can be suitably used for manufacturing a semiconductor device having a so-called standoff wherein a part of a conductor is projecting from an encapsulation resin.

Adhesive film for manufacturing semiconductor device

A method for manufacturing a semiconductor device includes the steps of: (1) forming a plurality of electrically conductive parts on portions of an adhesive layer of an adhesive sheet, the adhesive sheet having a base layer and the adhesive layer; (2) attaching at least one semiconductor element having electrodes to the adhesive layer, wherein an electrode-free side of the semiconductor element is attached to the adhesive layer; (3) electrically connecting a wire between each of the electrically conductive parts and each of the electrodes of the semiconductor element; (4) sealing the semiconductor element in a sealing resin to form a semiconductor device on the adhesive sheet; and (5) separating the adhesive sheet from the semiconductor device. This method enables the production of thin semiconductor devices with a surface mount type.

The present invention provides a process for the peeling of a resist material with a pressure-sensitive adhesive sheet which involves the improvement in the removal of resist material or the enhancement of peelability of resist material to certainly remove the resist material from the object regardless of the properties or treated state of the resist material. The process comprises (1) after the application of the pressure-sensitive adhesive sheet, effecting a stress-imparting treatment which causes shrinkage or expansion of the pressure-sensitive adhesive sheet so that a stress develops at the interface between the resist material and the object or (2) prior to the application of the resist material to the object, effecting surface treatment to the object such that the surface of the object has a surface free energy of to not greater than 60 dyne/cm.

Process for the removal of resist material

A double-sided circuit board of which a solder conductor is prevented from deformation in a cycling test so as to maintain high connection reliability, comprises an insulating layer made of an organic high molecular weight resin and a circuit provided on each side of the insulating layer the circuits on both sides being electrically connected through via-holes filled with a conductor made of solder having a metal powder dispersed therein.

Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board

A plurality of double-sided circuit boards in which a circuit is provided on either side of an insulating layer comprising an organic high molecular resin with an alloy foil as a basic substance, and two circuits are electrically connected by a via with a soldered conductor a filled therein are laminated via an adhesive layer The adhesive layer has a bore opened at a predetermined position of a portion in direct contact with the circuits of two double-sided circuit boards A bore portion is provided with a soldered conductor The circuits of the two double-sided circuit boards are electrically connected by the soldered conductor

Multi-layer wiring board and method for manufacturing the same

A wafer-scale package structure in which a circuit board for rearranging electrode pads of a wafer is laminated on the wafer integrally. The circuit board can be divided into individual chip-size packages (CSPS) and which includes a layer of polyimide resin, and connection between the wafer and the circuit board is performed by solder bump, while the circuit board is stuck on the wafer with an adhesive.

Growing community of inventors

Ibaraki, Japan

Takuji Okeyui