Hitachi, Ltd.

Nippon Telegraph and Telephone Public Corporation

Takuji Mukaemachi

Tetsuo Takeshita

Taihei Suzuki

Takafumi Kojima

Tatsuru Miyoshi

Hirotoshi Shirasu

Tohru Hoshi

Yutaka Fukushima

Kouichi Yamamoto

Shiroh Enami

Shiro Enami

Keiichi Shimizu

Ryoichi Himeno

Yoshiaki Mijioka

In a digital and electronic switching apparatus, each subscriber's circuit is provided with a loop back circuit which selectively return a downward channel signal to an upward channel in order that a ring back tone informing a calling telephone set of the fact that a called telephone set is being dialed can be synchronized with a ringing tone dialing a called telephone set. Upon dialing a called subscriber, the loop back circuit is ON-OFF controlled in synchronism with the ON-OFF control of the ringing tone so that a tone signal generated from a common continuous ring back tone source can be transmitted to the loop back circuit and the calling telephone set via a speech path of a switching network.

Ring back tone transmission system

A back-up control system of a redundancy configuration suited to be used for a time division switching network. The control system includes connecting paths extending from each of the load supply devices, the paths being classified into an active connecting path and a corresponding standby connecting path coupled to different ones of the load accommodating devices which are provided in a number equal to or larger than three. The total load accommodating capacity of the load accommodating devices is provided with a margin or excess capacity which is smaller than the capacity required for accommodating all full loads supplied from the load supply devices but is not smaller than the load accommodating capacity of any one of the load accommodating devices. At least one of the load accommodating devices is connected to the active connecting path and the spare connecting path which corresponds to another one than the just mentioned active connecting path. Control means is included for performing a switching operation in such a manner that, in a normal operation, the load is supplied from each of the load supply devices through the respective active connecting path to the load accommodating device to which the just mentioned load supply device is connected, while upon occurrence of failure in a given one of the load accommodating devices, the load supplied from the associated load supply device to the fault load accommodating device through the active connecting path is transferred to another one of the load accommodating devices which is connected to the associated load supply device through the standby connecting path corresponding to the above mentioned active connecting path, whereby the load corresponding to a load accommodating capacity of the fault load accommodating device is borne by the other load accommodating devices.

Back-up control system implemented with a redundancy scheme for

A multi-stage switching network comprises a plurality of unitary switch matrices each including a number of cross-point circuits each of which in turn includes a memory circuit operatively connected to the associated cross-point switches in a speech path. The plurality of the unitary switch matrices are arranged in a matrix array in which each stage of the multi-stage switching network is constituted by the unitary switch matrices arrayed in at least one column thereof and interconnected through links. The memory circuit for performing ON/OFF control of the associated cross-point switches in each of the switch matrices incorporates therein at least three logical control signal input terminals to which at least an information signal for designating the switch matrix to be selected and information signals for designating a row and a column in the selected switch matrix are applied, the latter information signals being produced in common to all the switch matrices, whereby a given cross-point determined by these information signals in the selected matrix is selected and correspondingly controlled. The ON/OFF control of the cross-point switch is effected sequentially by a stage selecting information signal from stage to stage.

Multi-stage switching network controlled by at least three logical inputs

A ringing control apparatus comprises a bidirectional switching circuit connected in series to a ringing source, which generates an alternating current of a large amplitude, for delivering to a called subscriber the AC signal as an interrupted ringing signal, a phase detector circuit in the form of a zero level detector for detecting the phase of the AC signal generated from the ringing source, and a control circuit for generating a signal for turning on and off the switching circuit in synchronism with the output signal of the phase detector circuit. The delivery of the ringing to the called subscriber is started at a point of time when the ringing voltage comes to a zero level and is stopped at a point of time when the ringing current comes to a zero level, thereby to prevent generation of a surge voltage.

Ringing control apparatus

A speech path apparatus in a space-division type electronic exchanger equipment wherein a plurality of switching networks each having controlled points and a plurality of trunks are divided into an appropriate number of packaging units, and a network controller and a trunk controller are provided for each packaging unit. Each of the network controllers and the trunk controllers includes a shift register for receiving a control signal sent from a central processing unit in serial form, a means for determining whether the received control signal is for its own unit and means for translating a control signal stored in the shift register to send it out in parallel form to the controlled point.

Speech path packaging unit including controller containing shift register

A testing system for testing an impedance of a subscriber line by connecting a test circuit to the subscriber line through one of channels in a network including current self-holding semiconductor switching devices, wherein a series circuit of a second channel and a constant current source is connected in parallel with said first-mentioned channel whereby the current self-holding semiconductor switching devices in said first and second channels are kept conductive by said constant current source.

Subscriber line testing system

A speech path system for a telephone exchange having crosspoint switches of a speech path network comprising semiconductor switching devices of four or more layers, including a memory circuit for storing the operating conditions of said switching devices, a drive circuit of a high A.C. impedance for actuating said switching devices in response to output signals from said memory circuit, a subscriber D.C. loop detection circuit of a high impedance provided at a subscriber terminal of said speech path network, and a speech current supply circuit with speech current switching means and a supply current detection circuit provided at a trunk terminal of said speech path network.

Speech path system

A plurality of cross-point matrices each having a plurality of holding circuits respectively associated with a corresponding cross point are arranged in multiple stages, which are linked with each other to form a multi-stage switching network. Each switch matrix is provided with an associated NAND gate connected to gates capable of being selectively impressed with the signals representing the state of the holding circuits in a row or column within the particular switch matrix. The output of the NAND gate is connected to an OR gate for each stage.

Cross-point switch matrix and multistage switching network using the same

A plurality of cross-point matrices each having a plurality of holding circuits respectively associated with a corresponding cross point are arranged in multiple stages, which are linked with each other to form a multi-stage switching network. Each switch matrix is provided with an associated NAND gate connected to gates capable of being selectively impressed with the signals representing the state of the holding circuits within the particular switch matrix. The output of the NAND gate is connected to an OR gate for each stage.

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Yokohama, Japan

Takuji Mukaemachi