Hitachi-high-technologies Corporation

Takeyuki Yoshida

Takashi Hiroi

Toshifumi Honda

Naoki Hosoya

Yasutaka Toyoda

Takuma Yamamoto

Hiroyuki Shindo

Taku Ninomiya

Shinichi Shinoda

Tsuyoshi Minakawa

Fumihiko Fukunaga

Provided is a pattern inspecting and measuring device that decreases the influence of noise and the like and increases the reliability of an inspection or measurement result during inspection or measurement using the position of an edge extracted from image data obtained by imaging a pattern as the object of inspection or measurement. For this purpose, in the pattern inspecting and measuring device in which inspection or measurement of an inspection or measurement object pattern is performed using the position of the edge extracted, with the use of an edge extraction parameter, from the image data obtained by imaging the inspection or measurement object pattern, the edge extraction parameter is generated using a reference pattern having a shape as an inspection or measurement reference and the image data.

Pattern inspecting and measuring device and program

Provided is an examination technique to detect defects with high sensitivity at an outer-most repetitive portion of a memory mat of a semiconductor device and even in a peripheral circuit having no repetitiveness. A circuit pattern inspection apparatus comprises an image detection unit for acquiring an image of a circuit pattern composed of multiple die having a repetitive pattern, a defect judgment unit which composes, in respect of an acquired detected image, reference images by switching addition objectives depending on regions of repetitive pattern and the other regions and compares a composed reference image with the detected image to detect a defect, and a display unit for displaying the image of the detected defect.

Circuit pattern examining apparatus and circuit pattern examining method

A circuit-pattern inspection apparatus and related method provide a highly sensitive defect inspection of an area including the most circumferential portion of a memory mat of a semiconductor chip formed on a semiconductor wafer. In certain examples, an image of a circuit pattern of a die formed on the semiconductor wafer is acquired to judge whether or not the circuit pattern contains a defect.

Inspection apparatus and an inspection method for inspecting a circuit pattern

Growing community of inventors

Hitachinaka, Japan

Takeyuki Yoshida