Sumitomo Electric Industries, Limited

Renesas Electronics Corporation

Nara Institute of Science and Technology

National Institute of Advanced Industrial Science and Technology

Takeyoshi Masuda

Keiji Wada

Toru Hiyoshi

Yu Saitoh

Shin Harada

Taku Horii

Hideki Hayashi

Shunsuke Yamada

Misako Honaga

Ryosuke Kubota

Kosuke Uchida

Tomoaki Hatayama

Kenji Hiratsuka

Hiromu Shiomi

Shinji Kimura

So Tanaka

Hideto Tamaso

Kazuhiro Fujikawa

Makoto Sasaki

Yasuo Namikawa

Mitsuhiko Sakai

Shinji Matsukawa

Masayuki Kobayashi

Satomi Itoh

Daisuke Hamajima

Shinsuke Harada

Takashi Tsuno

Michio Murata

Tomihito Miyazaki

Mitsuru Shimazu

Ryouji Kosugi

Masato Tsumori

A silicon carbide semiconductor device includes a silicon carbide substrate, a first electrode, and a second electrode. The silicon carbide substrate has a first main surface, a second main surface, a first impurity region, a second impurity region, and a third impurity region. The first electrode is in contact with each of the second impurity region and the third impurity region on the first main surface. The second electrode is in contact with the first impurity region on the second main surface. The second impurity region includes a first region and a second region disposed between the first region and the second main surface and in contact with the first region. An impurity concentration of the first region is more than or equal to 6×10cm.

Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

A silicon carbide semiconductor device includes a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface. A gate trench is provided in the first main surface. The gate trench is defined by side surfaces and a bottom surface. The side surfaces penetrate the source region and the body region to reach the drift region. The bottom surface connects to the side surfaces. The gate trench extends in a first direction parallel to the first main surface. The silicon carbide substrate further includes an electric field relaxation region that is the second conductive type, the electric field relaxation region being provided between the bottom surface and the second main surface and extending in the first direction, and a connection region that is the second conductive type, the connection region electrically connecting a contact region to the electric field relaxation region. In a plan view in a direction normal to the first main surface, the gate trench and the electric field relaxation region are disposed on a virtual line that extends in the first direction, and the connection region is in contact with the electric field relaxation region on the virtual line.

Silicon carbide semiconductor device

In the direction from the first main surface toward the second main surface through each of the second impurity region and the fourth impurity region, a concentration profile of an n-type impurity has a second relative maximum value and a fourth relative maximum value located closer to the first main surface than a position where the second relative maximum value is exhibited. The fourth relative maximum value is larger than the third relative maximum value, the third relative maximum value is larger than the second relative maximum value, and the second relative maximum value is larger than the first relative maximum value.

A silicon carbide semiconductor device has a silicon carbide substrate, a first insulator, a first electrode, and a second electrode. The silicon carbide substrate includes a first impurity region, a second impurity region, a third impurity region, a first superjunction portion, a fourth impurity region, a fifth impurity region, a sixth impurity region, and a second superjunction portion. The first superjunction portion has a first region and a second region. The second superjunction portion has a third region and a fourth region. In a direction perpendicular to a second main surface, a bottom surface of a first trench is located between a second end surface and the second main surface and is located between a fourth end surface and the second main surface.

A semiconductor device includes a first layer of first conductivity type and including an element region where semiconductor elements are to be formed, an annular second layer of second conductivity type formed to include a surface of the first layer, and surrounding the element region in a plan view, a third layer of second conductivity type formed in the first layer and separated more from the surface than the second layer, and sandwiching a portion of the first layer between the second and third layers, a fourth layer of second conductivity type and electrically connecting the second and third layers, and an electrode electrically connected to the fourth layer inside the second layer in the plan view. effective concentration of a second conductivity type impurity included in the second layer is higher than that of the first layer, and lower than that of the third layer.

Semiconductor device

A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate includes a first impurity region, a second impurity region, a third impurity region, a fourth impurity region, a fifth impurity region, and a sixth impurity region. A first main surface of the silicon carbide substrate is provided with a trench defined by a side surface and a bottom portion. The sixth impurity region includes a first region which faces the bottom portion and a second region which faces a second main surface of the silicon carbide substrate. The first region is higher in impurity concentration than the second region. In a direction perpendicular to the second main surface, a fifth main surface of the fourth impurity region is located between a sixth main surface of the second impurity region and the second main surface.

Silicon carbide semiconductor device and method of manufacturing the same

A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, and a gate electrode. The gate insulating film is provided as being in contact with the first main surface of the silicon carbide substrate. The gate electrode is provided on the gate insulating film such that the gate insulating film lies between the gate electrode and the silicon carbide substrate. In a first stress test in which a gate voltage of &#x2212;5 V is applied to the gate electrode for 100 hours at a temperature of 175&#xb0; C., an absolute value of a difference between a first threshold voltage and a second threshold voltage is not more than 0.5 V, with a threshold voltage before the first stress test being defined as the first threshold voltage and a threshold voltage after the first stress test being defined as the second threshold voltage.

Silicon carbide semiconductor device and method for manufacturing the same

A silicon carbide film has first and second main surfaces. The second main surface has an element formation surface and a termination surface. The silicon carbide film has a first range that constitutes a first main surface and an intermediate surface opposite to the first main surface, and a second range that is provided on the intermediate surface and constitutes the element formation surface. The first range includes: a first breakdown voltage holding layer, and a guard ring region partially provided at the intermediate surface in the termination portion. The second range has a second breakdown voltage holding layer. The second range has one of a structure only having the second breakdown voltage holding layer in the termination portion and a structure disposed only in the element portion of the element portion and the termination portion.

Silicon carbide semiconductor device and method for manufacturing same

A silicon carbide layer includes a drift region, a body region and a source region. The drift region constitutes a first main surface and has a first conductivity type. The body region is provided on the drift region, and has a second conductivity type. It is provided on the body region to be separated from the drift region, constitutes a second main surface, and has the first conductivity type. The silicon carbide layer is provided with a trench including a first side wall portion and a first bottom portion. The silicon carbide layer is embedded in the drift region to face the first bottom portion, and includes a second conductivity type region having the second conductivity type. The second conductivity type region is electrically connected to the source region.

A silicon carbide semiconductor device includes a silicon carbide substrate, a gate oxide film, and a gate electrode. A trench is provided in the main surface to have a side surface and a bottom portion. A contact point between a first side surface portion and a second side surface portion is located in a third impurity region. An angle formed by the first side surface portion and a straight line extending through the contact point and parallel to the main surface is smaller than an angle formed by the second side surface portion and a boundary surface between a first impurity region and a second impurity region. A thickness of a portion of the gate oxide film on the contact point between the main surface and the first side surface portion is larger than a thickness of a portion of the gate oxide film on the second impurity region.

Silicon carbide semiconductor with trench gate

A silicon carbide semiconductor substrate includes: a base substrate that has a main surface having an outer diameter of not less than 100 mm and that is made of single-crystal silicon carbide; and an epitaxial layer formed on the main surface. The silicon carbide semiconductor substrate has an amount of warpage of not less than &#x2212;100 &#x3bc;m and not more than 100 &#x3bc;m when a substrate temperature is a room temperature and has an amount of warpage of not less than &#x2212;1.5 mm and not more than 1.5 mm when the substrate temperature is 400&#xb0; C.

Silicon carbide semiconductor substrate, method for manufacturing silicon carbide semiconductor substrate, and method for manufacturing silicon carbide semiconductor device

A silicon carbide semiconductor device includes: a silicon carbide off substrate including a main surface having an off angle relative to a basal plane, the main surface being provided with a trench, the trench having a plurality of side walls and a bottom portion; a gate insulating film covering the side walls and the bottom portion; and a gate electrode provided on the gate insulating film, each of the side walls having an angle of more than 65&#xb0; and not more than 80&#xb0; relative to the basal plane in the trench, opening directions of the plurality of side walls being all at a silicon plane side or a carbon plane side.

Silicon carbide semiconductor device having a trench with side walls and method for manufacturing same

A trench has first to third side surfaces respectively constituted of first to third semiconductor layers. A first side wall portion included in a first insulating film has first to third regions respectively located on the first to third side surfaces. A second insulating film has a second side wall portion located on the first side wall portion. The second side wall portion has one end and the other end, the one end being connected to the second bottom portion of the second insulating film, the other end being located on one of the first and second regions, the other end being separated from the third region.

A silicon carbide semiconductor device includes a silicon carbide semiconductor layer having a main surface, the main surface of the silicon carbide semiconductor layer being provided with a trench having a closed shape when seen in plan view, the trench including a bottom, a plurality of sidewalls continuous with the bottom, and a sidewall-connecting corner portion at a connection portion between two adjacent sidewalls of the plurality of sidewalls, the silicon carbide semiconductor device further including a gate insulating film covering the bottom and the sidewalls of the trench, and a gate electrode provided on the gate insulating film, between the bottom and an upper end of the trench, the thickness of the gate insulating film at the sidewall-connecting corner portion of the trench being greater than the thickness of the gate insulating film at a portion other than the sidewall-connecting corner portion.

Growing community of inventors

Osaka, Japan

Takeyoshi Masuda