Fujitsu Corporation

Takeyasu Saito

Shan Sun

Katsuyoshi Matsuura

Satoru Mihara

Yukinobu Hikosaka

George Hickert

Soichiro Ozawa

Naoya Sashida

Hideyuki Noshiro

Kaoru Saigoh

Kenichi Inoue

Fan Chu

Yasutaka Ozaki

Jirou Miura

Tatsuya Yokota

Koji Tani

Yoshinori Obata

Kazuaki Takai

Yoshimasa Horii

Jeffrey Scott Cross

Seiji Ueno

Mitsushi Fujiki

Akio Itoh

Naoyuki Satoh

A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.

Semiconductor device and method of manufacturing the same

There are provided a first insulating film formed over a semiconductor substrate, actual operating capacitors formed on the first insulating film in a memory cell region vertically and horizontally, dummy capacitors formed selectively at four corners of the memory cell region, and a second insulating film formed on the actual operating capacitors and the dummy capacitors.

Semiconductor device

A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO , wherein the PZT film includes pinholes, with a pinhole density of about 17 &mgr;m or less.

Ferroelectric semiconductor memory device and a fabrication process thereof

A semiconductor device having conductive plug for connecting capacitor and conductive pattern, comprises first and second impurity diffusion regions formed in a semiconductor substrate, a first insulating film formed over the semiconductor substrate, a first hole formed in the first insulating film on the first impurity diffusion region, a first conductive plug formed in the first hole and made of a metal film, a second hole formed in the first insulating film on the second impurity diffusion region, a second conductive plug formed in the second hole and made of conductive material that is hard to be oxidized rather than the metal film, and a capacitor that consists of a lower electrode connected to an upper surface of the second conductive plug, a dielectric film, and an upper electrode.

A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr Ru O , on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500&deg; C. to 700&deg; C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr Ru O . The second anneal is performed at 300&deg; C. to 500&deg; C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.

Process for producing a strontium ruthenium oxide protective layer on a top electrode

A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO , wherein the PZT film includes pinholes, with a pinhole density of about 17/&mgr;m or less.

A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.

Growing community of inventors

Kawasaki, Japan

Takeyasu Saito