Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Taketoshi Shikano

Hiroshi Yoshida

Ken Sakamoto

Hiroshi Kawashima

Naoki Yoshimatsu

Satoshi Kondo

Dai Nakajima

Yuji Imoto

Taishi Sasaki

Keitaro Ichikawa

Masayoshi Shinkai

Kenichi Hayashi

Koji Tanaka

Mitsugu Tanaka

Hisashi Kawafuji

Junji Fujino

Shinya Soneda

Koichi Nishi

Mikio Ishihara

Yasunari Hino

Daisuke Murata

Shinsuke Asada

Kiyoshi Ishida

Kazuhiro Tada

Nobuyoshi Kimoto

Yusuke Ishiyama

Tatsuo Ota

Takamasa Iwai

Shingo Sudo

Norikazu Sakai

Fumihito Kawahara

Masanori Tsukuda

Kiyohiro Uchida

Mitsugu Tajiri

Yuji Shikasho

Yoshihiro Takai

Claudio Feliciani

A first principal electrode and a first control electrode pad are formed on a first principal surface of the semiconductor chip. A second principal electrode and a second control electrode pad are formed on a second principal surface of the semiconductor chip. The second principal electrode and the second control electrode pad are respectively bonded to first and second metal patterns of an insulating substrate. Bonding sections of first and second wires overlap a bonding section of the second principal electrode or the second control electrode pad in plan view. Thickness of the first and second metal patterns is 0.2 mm or less.

Semiconductor device

Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.

Power semiconductor device and manufacturing method thereof

A first lead terminal, a second lead terminal provided parallel to the first lead terminal, and a tie bar connecting the first lead terminal and the second lead terminal are provided. The tie bar includes a first narrow-width section touching the first lead terminal, a second narrow-width section touching the second lead terminal, and a wide-width section having a larger width than the first narrow-width section and the second narrow-width section and connecting the first narrow-width section and the second narrow-width section. The wide-width section has a through-hole formed between the first narrow-width section and the second narrow-width section.

Method for manufacturing semiconductor device

A lead frame () includes an inner lead (), an outer lead () connected to the inner lead (), and a power die pad (). A power semiconductor device () is bonded onto the power die pad (). A first metal thin line () electrically connects the inner lead () and the power semiconductor device (). Sealing resin () seals the inner lead (), the power die pad (), the power semiconductor device (), and the first metal thin line (). The sealing resin () includes an insulating section () directly beneath the power die pad (). A thickness of the insulating section () is 1 to 4 times a maximum particle diameter of inorganic particles in the sealing resin (). A first hollow () is provided on an upper surface of the sealing resin () directly above the power die pad () in a region without the first metal thin line () and the power semiconductor device ().

Power semiconductor apparatus and manufacturing method therefor

Lead frame and method for manufacturing semiconductor device

A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.

Semiconductor device and method for manufacturing the same

A power semiconductor device includes a power semiconductor element, a controlling element, a first lead frame and a second lead frame, respectively, a first metal wire electrically connecting the power semiconductor element and the first lead frame, and a sealing body covering these components. The first lead frame includes a first inner lead having a connecting surface to which one end of the first metal wire is connected. Among surfaces of the sealing body, in a side surface, a resin inlet mark is formed in a side surface portion from which the first lead frame and the second lead frame do not project, the resin inlet mark being greater in surface roughness than another area. The resin inlet mark is formed opposite to a side where the first metal wire is positioned on the connecting surface when seen in the direction along the mounting surface.

Power semiconductor device and method for manufacturing the same

A power semiconductor element is fixed on a die pad of the lead frame. A metal plate is bonded to a lower surface of the die pad via an insulating film. The inner lead etc. are disposed in a cavity between a lower mold and an upper mold and are encapsulated with an encapsulation resin. The lower mold has a stepped portion provided in a bottom surface of the cavity below the inner lead. A height of an upper surface of the stepped portion is larger than a height of an upper surface of the power semiconductor element disposed in the cavity. When an encapsulation resin is injected into the cavity, a lower surface of the metal plate is in contact with the bottom surface of the cavity, and the encapsulation resin flows downward from above the stepped portion toward the upper surface of the power semiconductor element.

Power semiconductor device and method of manufacturing the same

A semiconductor device according to the present invention includes an insulating substrate having a circuit pattern, semiconductor elements bonded on the circuit pattern with a brazing material, and a wiring terminal bonded with a brazing material on an electrode provided on each of the semiconductor elements on an opposite side of the circuit pattern, in which a part of the wiring terminal is in contact with the insulating substrate, and insulated from the circuit pattern.

An object is to provide a technique in which a cost reduction in a power semiconductor device can be achieved while maintaining heat dissipation performance as much as possible. A power semiconductor device includes a leadframe, a power semiconductor element disposed on an upper surface of the leadframe, and an insulating layer disposed on a lower surface of the leadframe. At least a partial line of a peripheral line of a region where the insulating layer is disposed, on the lower surface, is aligned, in top view, with at least a partial line of an expanded peripheral line obtained by shifting outwardly, by the amount corresponding to the thickness of the leadframe, the peripheral line of the region where the power semiconductor element is disposed, on the upper surface.

Power semiconductor device

A semiconductor device incorporating a heat spreader and improved to inhibit dielectric breakdown is provided. The semiconductor device has an electrically conductive heat spreader having a bottom surface, a sheet member having a front surface and a back surface electrically insulated from each other, IGBTs and diodes fixed on the heat spreader and electrically connected thereto, and a molding resin. The front surface contacts with the bottom surface and has a peripheral portion jutting out from edges thereof. The molding resin encapsulates the front surface of the sheet member, the heat spreader and the semiconductor elements. At least part of the back surface of the sheet member is exposed out of the molding resin. The heat spreader has, at a corner of its bottom surface, corner portions having a beveled shape or a curved-surface shape as seen in plan and having a rectangular shape as seen in section.

Semiconductor device and method of manufacturing semiconductor device

Entry of resin into a cylindrical electrode can be suppressed without excessively increasing the number of parts and without unnecessarily damaging members. For this purpose, a semiconductor chip and a cylindrical electrode are mounted on one main surface of substrate. The substrate, the semiconductor chip, and the cylindrical electrode are sealed with resin material such that the cylindrical electrode has one end mounted to the substrate and the other opposite end at least exposed. After the step of sealing, an opening extending from the other end of the cylindrical electrode to a cavity in the cylindrical electrode is formed. Before performing the step of forming an opening, the other end of the cylindrical electrode is closed.

A semiconductor device comprises: a semiconductor package having a top surface, a bottom surface, and a through hole provided from the top surface to the bottom surface; and an electrode inserted into the through hole of the semiconductor package. The semiconductor package includes: an insulating substrate; a semiconductor chip on the insulating substrate; an electrode pattern on the insulating substrate and connected to the semiconductor chip; a resin sealing the insulating substrate, the semiconductor chip, and the electrode pattern; and an electrode section on an inner wall of the through hole and connected to the electrode pattern. The through hole penetrates the insulating substrate and the resin. The electrode inserted into the through hole is connected to the electrode section inside the semiconductor package.

A method of manufacturing a semiconductor device comprises: preparing a lead frame including a package external region and a package internal region, a burred surface being provided at a top end of a side of the lead frame, and a fracture surface being provided in the vicinity of the top end of the side; chamfering the top end of the side in the package external region; mounting a semiconductor element on the lead frame and sealing the semiconductor element with mold resin in the package internal region; and removing resin burr provided on the side of the lead frame in the package external region after the chamfering and the sealing.

Method for manufacturing semiconductor device including removing a resin burr

A method of manufacturing a semiconductor device, includes the steps of mounting a lead frame in a recessed portion of a lower die, bringing the lower die and an upper die to overlap each other so that a portion for sliding the lead frame slides the lead frame toward injection surfaces, the sliding portion being formed on the recessed portion of the lower die or on the recessed portion of the upper die, clamping the lower die and the upper die together so that at least one projection formed on the upper die crushes down an end portion of the lead frame so as to form lateral projections on the left and right sides of the gate, the lateral projections blocking up the gap between the injection surfaces and the lead frame, and injecting a molding resin through the gate.

Growing community of inventors

Tokyo, Japan

Taketoshi Shikano