Tdk Corporation

Takeshi Oyanagi

Takeshi Yanata

Naoyoshi Yoshida

Masayuki Uchida

Satoshi Goto

Yusuke Imai

Takahiro Itami

Daiki Suzuki

Shin Kagaya

Yo Saito

Takashi Inagaki

Hitoshi Ishida

Katsunari Moriai

Kazuto Takeya

Kaname Ueda

Koki Yamada

Kazuaki Kajiwara

A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

Method for producing chip varistor and chip varistor

A multilayer chip varistor includes an element body, first and second external electrodes, and first and second electrical conductor groups. The first electrical conductor group includes a first internal electrode connected to the first external electrode, and a first intermediate electrical conductor opposed to the first internal electrode. The second electrical conductor group includes a second internal electrode including a first electrically conductive material and connected to the second external electrode, and a second intermediate electrical conductor opposed to the second internal electrode. At least one of the first and second intermediate electrical conductors includes the second electrically conductive material. The element body includes a low electrical resistance region between the first and second internal electrodes. The second electrically conductive material is diffused in the low electrical resistance region.

Multilayer chip varistor

A voltage nonlinear resistor ceramic comprises: a Zn oxide; a Co oxide; an R (specific rare earth) oxide; a Cr oxide; an M1 (Ca, Sr) oxide; an M2 (Al, Ga, In) oxide; and strontium titanate. When content of the Zn oxide is assumed to be 100 mole portion in terms of Zn, content of the Co oxide is 0.30 to 10 mole portion in terms of Co, content of the R oxide is 0.10 to 10 mole portion in terms of R, content of the Cr oxide is 0.01 to 2 mole portion in terms of Cr, content of the M1 oxide is 0.10 to 5 mole portion in terms of M1, content of the M2 oxide is 0.0005 to 5 mole portion in terms of M2, and content of the strontium titanate is 0.10 to 5 mole portion in terms of SrTiO.

Voltage nonlinear resistor ceramic and electronic component

A piezoelectric device has: a ceramic substrate having a first principal surface and a second principal surface opposed to each other; a piezoelectric element arranged on the first principal surface; a frame having a first face and a second face opposed to each other and arranged on the ceramic substrate so as to surround the piezoelectric element; a metal layer arranged on the second face of the frame; and a metal lid arranged on the metal layer so as to close a space surrounded by the frame. The first face of the frame is in contact with the first principal surface of the ceramic substrate. The metal layer and the metal lid are joined to each other by resistance welding. The frame has a composite portion containing a metal and a metal oxide and the composite portion includes the second face and is in contact with the metal layer.

Piezoelectric device

Provided is a piezoelectric device capable of improving measurement precision of a temperature of a piezoelectric element. A piezoelectric device () includes a package () including a housing member () having a thermistor substrate () and a frame () provided to project from a first main surface () of the thermistor substrate () and in which a housing part () is formed by the first main surface () and the frame () and a lid () provided on the frame () to cover a space () of the housing part (), and a piezoelectric vibration element () provided on the first main surface () of the thermistor substrate () in the housing part (), wherein the thermistor substrate () is a multilayer negative temperature coefficient (NTC) thermistor.

Temperature compensated piezoelectric oscilator device package wherein the base of the package consists of a multilayer thermistor

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Tokyo, Japan

Takeshi Oyanagi