Renesas Technology Corp.

Mitsubishi Denki Kabushiki Kaisha

Sony Corporation

Ps4 Luxco S.a.r.l.

Other

Micron Technology Incorporated

Elpida Memory, Inc.

Takeshi Kishida

Hiroaki Nishimura

Tomoharu Mametani

Yukihiro Nagai

Akinori Kinugasa

Shigenori Kido

Jiro Matsufusa

Yoji Nakata

Yusuke Kawase

The semiconductor storage device includes a lower electrode that are vertically extended from a semiconductor substrate, a beam including a first portion extending in a horizontal direction to support the lower electrode and a second portion that is vertically extended along the exterior wall of the electrode from the first portion.

Semiconductor device including a semiconductor substrate, a pillar, and a beam

In a semiconductor device including active regions which are adjacent to each other with an element isolation region interposed therebetween and which are different in height from the element isolation region, when a contact is formed in a gate wiring on the element isolation region, a contact failure is caused. Provided is a semiconductor device including an element isolation region, two active regions adjacent to each other with the element isolation region interposed therebetween and having surfaces which are higher than that of the element isolation region, a gate wiring commonly led from the respective active regions and extending through the element isolation region, and a contact for connecting the gate wiring to a conductor layer above the gate wiring. The contact is provided in a region other than the element isolation region, or is provided in an expanded element isolation region.

Semiconductor device, designing method therefor, and manufacturing method therefor

A semiconductor device may include, but is not limited to, a semiconductor substrate having a device isolation groove defining first to fourth device formation portions. The second device formation portion is separated from the first device formation portion. The third device formation portion extends from the first device formation portion. The third device formation portion is separated from the second device formation portion. The fourth device formation portion extends from the second device formation portion. The fourth device formation portion is separated from the first and third device formation portions. The third and fourth device formation portions are positioned between the first and second device formation portions.

Method for manufacturing a semiconductor device

A semiconductor device according to the invention includes: a first region on a semiconductor substrate, in which a first transistor is formed, the first transistor including first gate insulating filmcontaining a high dielectric constant material and first metal gate electrodeformed on first gate insulating film; a second region adjacent to the first region on the semiconductor substrate, in which a second transistor is formed, the second transistor including second gate insulating filmand second metal gate electrodeformed on the second gate insulating film, a layered structure of electrode materials of the second transistor being different from a layered structure of electrode materials of the first transistor; and a first and a second line, the lines being of different potentials, wherein a border between the first and the second region overlaps with at most only the first or the second line.

Border between semiconductor transistors with different gate structures

Semiconductor device having isolation groove and device formation portion

A moving object detection device accurately detects moving objects. The device includes a motion vector calculation section calculating motion vectors from an input image; a motion vector removal section removing a motion vector having high randomness from the calculated motion vectors; a motion vector accumulation section temporally accumulating each motion vector not removed by the motion vector removal section, and calculating an accumulated number of occurrences and an accumulated value of each motion vector; and a moving object detection section determining, based on the calculated accumulated value and calculated accumulated number of occurrences of each motion vector, whether each motion vector corresponds to a moving object.

Moving object detection apparatus, method and program

On a silicon oxide film including the interior of an opening a semispherical RGP film is deposited. At a temperature lower than that allowing a crystal of silicon to be grown a BPTEOS film is deposited to fill the opening. Then a portion other than the semispherical RGP film introduced in the opening is chemically mechanically polished and thus removed. This contributes to reduced crystal growth of silicon at the semispherical RGP film and hence reduced scattering and/or removal of the RGP film for example when a CMP step is performed. Subsequently the semispherical RGP film is annealed to grow a crystal of silicon to form a generally spherical RGP film. Thus a storage node can have an increased surface area and a capacitor can have increased capacity.

Method of fabricating semiconductor device

In a semiconductor device, an active region is formed in a semiconductor substrate separated by a plurality of isolation regions. A plurality of surface insulating films of different thickness are formed separately on the active region. A plurality of conductive films are formed on the respective insulating films. Then, one of the surface insulating film having smaller thickness is caused to break down to work as an electric fuse.

Semiconductor device having a potential fuse, and method of manufacturing the same

A photolithography step is carried out for exposing/etching a resist film in an etching step. Thereafter a superposition inspection step employing a superposed layer superposition mark and a resist film superposition mark is carried out with a superposition inspection apparatus. In this step, an applied mask confirmation step is simultaneously carried out with the superposition inspection apparatus. Thus, it is possible to provide a method of fabricating a semiconductor device including a superposition inspection step, capable of efficiently confirming an applied mask and improving the fabrication yield for the semiconductor device.

Method of fabricating semiconductor device comprising superposition inspection step

A semiconductor device having a test mark comprising: a semiconductor substrate; a first TEOS layer formed on the semiconductor substrate; a second TEOS layer formed on the first TEOS layer and having a fluidity lower than that of the first TEOS layer at an elevated temperature; a recess formed in the first and second TEOS layers and exposing the surface of the semiconductor substrate, wherein the horizontal cross section of the recess is substantially rectangular in configuration; and a metal layer formed between the first and second TEOS layers and opposing to the corner of the recess.

Semiconductor device having test mark

There is described a semiconductor device having a storage node capacitor structure suitable for rendering memory cells compact, and storage nodes are prevented from tilting. The device includes a storage node which has a vertical surface extending in the direction perpendicular to the surface of a semiconductor substrate, and a dielectric film for tilt prevention purposes which is brought into close contact with the side surface of the vertical surface and which prevents the vertical surface from tilting.

Semiconductor device, and method of manufacturing the same

A semiconductor device with a high reliability is provided. The semiconductor device includes a silicon substrate, titanium nitride films and an interlayer insulating film. A first opening is formed in the titanium nitride film. A second opening having a diameter different from that of the first opening is formed in the second titanium nitride film. A contact hole is formed in the interlayer insulating film. A titanium film, a titanium nitride film, a plug layer and an interconnect layer are formed so as to be electrically connected to the titanium nitride films through the first and second openings.

Semiconductor device and fabrication process therefor and capacitor structure

This invention relates to a video signal processing circuit for easily simultaneously performing conversion of the number of lines and format conversion with a simple construction and an image pickup apparatus such as CCD using the circuit. A signal in a 4:2:2 format is supplied to a linear interpolating unit. Input luminance signals and input color difference signals of one line are written into line memories and the input luminance signals and the input color difference signals of the next one line are written into other memories. Similarly, signals are alternately written. The input luminance signal is read twice from the above memories in a period of writing signals of one line. The obtained signals are multiplied by coefficients for linear interpolation, respectively, and the resultant signals are added, thereby generating a luminance signal to be outputted. At the occasion of reading the input luminance signal twice, the input color difference signal is read once from the above memories and multiplied by each of coefficients, and the resultant signals are added, thereby generating a color difference signal to be outputted. A writing/reading control of a signal to/from memories and setting of the coefficients are performed by an interpolation control unit. Thus, the number of lines can be changed in a real time manner and the signal can be converted into a signal in a 4:2:0 format.

Video signal processing circuit and image pickup apparatus using the circuit

A contact structure is formed with no voids in an interlayer insulation film and good surface planarity. A first insulation film ( ) formed of p-TEOS is deposited to cover a substrate ( ) and wires ( ) formed on the substrate ( ). A second insulation film ( ) which is coating glass is formed by SOG. The surface is etched back from the opposite side to the substrate ( ); therefore, the second insulation film ( ) is etched. The etching is stopped at the point where the surface ( ) of the first insulation film ( ) on the wires ( ) is exposed. This ensures good surface,planarity. A third insulation film ( ) is stacked on top of the second insulation film ( ), and portions of the third insulation film ( ) above the wires ( ) are isotropically etched to form openings ( ). At this time, the isotropic etching does not extend over the second insulation film ( ).

Method of manufacturing contact structure

Provided is a method of manufacturing a semiconductor device having a capacitor above a semiconductor substrate, with which it is possible to reduce the number of steps and the cost of manufacture. Specifically, a polysilicon layer (,) in which impurity is diffused is deposited on the entire surface including the inside of a hole (,A). An etching process of the polysilicon layer (,) is performed to form a storage node electrode composed of the polysilicon layer (,) remaining on the bottom and side of a groove for metallization (,) and in the hole (,A). The storage node electrode is broadly divided into a storage node electrode body disposed on the bottom and side of the groove for metallization (,), and a plug part disposed in the hole (,A). The storage node electrode is electrically connected via the plug part to a diffused region (,) of a semiconductor substrate (,).

Growing community of inventors

Tokyo, Japan

Takeshi Kishida