Fuji Xerox Co., Ltd.

Takeshi Kamimura

Kazuhiro Sakai

Tsutomu Hamada

Shinobu Ozeki

Masao Funada

Kenichi Kobayashi

Junji Okada

Masaaki Miura

Tomo Baba

Kazuhiro Suzuki

Shinya Kyozuka

Hidenori Yamada

Osamu Takanashi

Seiji Suzuki

Takehiro Niitsu

Yoshihide Sato

Manabu Akamatsu

Masaru Kijima

Masashi Hisada

Norihiko Kuroishi

Jun Kitamura

Osamu Ueno

Hiroshi Fujimagari

Kunihiro Seno

Nobuo Mori

Akira Toshima

Hirotaka Mori

Yasuhiro Arai

Hirokazu Tsubota

Hisayoshi Mori

Kazuhiro Hama

Hiroki Ishida

Toshiki Matsui

Tsuyoshi Yaguchi

According to an aspect of the invention, a receiving apparatus includes a receiving unit, a reverse conversion unit, and an extracting unit. The receiving unit receives conversion data which is generated, based on a predetermined first rule, by converting transmission data including a plurality of bits and data including an error detection code for detecting an error of the transmission data. The reverse conversion unit reverse-converts, based on a predetermined second rule, the conversion data received by the receiving unit and reverse data generated by reversing a part of bits of the received conversion data to generate a plurality of reverse conversion data. The extracting unit extracts, from the plurality of the reverse conversion data, the reverse conversion data for which an error is not detected in an error detection based on the error detection code.

Receiving apparatus and data transmission apparatus

A data control device includes: a switch portion that has a plurality of first terminals on an upstream side, a plurality of second terminals on a downstream side, and a circuit portion that optionally switches a connection between the first terminals and the second terminals based on an external switching signal; and at least one control portion that has a first input/output portion on the upstream side and a second input/output portion on the downstream side, wherein the second input/output portion is connected to the first terminal of the switch portion and the first input/output portion is connected to the second terminal of the switch portion, and wherein the at least one control portion controls an input/output of data between the first input/output portion and the second input/output portion.

Data control device, storage device and method of connecting data control device

A data transfer apparatus includes a transmitting unit, a transmission controlling unit, and a generating unit. The transmitting unit transmits transmit data over a transmission channel having a plurality of lines, such that the transmit data are assigned to the plurality of lines by information unit of the transmit data, the information unit. The transmission controlling unit appends control data to transfer data to be transferred to a receiving side to compose the transmit data, the control data being for controlling transmission and reception of the transfer data. The generating unit obtains information about the number of the lines. The generating unit determines, based on the number of the lines and the number of information units of the control data, the number of information units of the transfer data that makes the number of information units of the transmit data integral multiple of the number of the lines.

Data transfer apparatus, data transmitting and receiving apparatus, and image forming apparatus

A data transmission apparatus includes a packet generation section, a frame encoding section, a transmission section, a reception section, a frame decoding section and a packet extraction section. The packet generation section generates a packet upon request. The frame encoding section generates a frame having a predetermined length by dividing the packet or adding dummy data to the packet and generates an error-correcting-code-added frame by adding an error correcting code to the frame. The transmission section transmits the generated error-correcting-code-added frame through a transmission line. The reception section receives the error-correcting-code-added frame. The frame decoding section performs an error detection and an error correction for the error-correcting-code-added frame. The packet extraction section extracts the packet by removing the error correcting code from the error-correcting-code-added frame for which the error detection and the error correction have been performed.

Data transmission apparatus, data transmission device, data reception device and data transmission system

A semiconductor storage device includes an external input/output port. A system bus of a server, which is extended to outside of the server, is connected to the external input/output port directly as a serial interface.

Semiconductor storage device and storage system

A computer readable medium stores a program causing a computer to execute a process for error recovery. The process includes: when an error is detected during transfer of dummy data for maintaining a link, executing device reset to recover from the error, and monitoring whether or not another error occurs during an error monitoring period starting from the device reset; when the other error occurs during the error monitoring period, executing the device reset to recover from the other error, monitoring whether or not still another error occurs during the error monitoring period starting from the device reset; counting number of the successive error monitoring periods in each of which the error occurs; and judging an error occurrence state based on a result of the counting.

Computer readable medium storing an error recovery program, error recovery method, error recovery apparatus, and computer system

For signals to be transmitted through a signal transmission path constituted by a relay device group for relay for each set of a plurality of channels, a timing adjustment unit is provided in both or one of a receiver-side LSI and a transmitter-side LSI for each set of a plurality of channels transmitted through the relay device group for relay so that the signals can be transmitted with accurate timing. In addition, the timing adjustment unit can adjust the timing for signals transmitted through each relay device group, the timing in one receiver-side LSI in signal transmission through a plurality of relay device groups, and the timing in one-to-many signal transmission in which signals are transmitted from one transmitter-side LSI to a plurality of receiver-side LSIs.

Signal transmission system

A multifunction system has advanced functions and high speed capability and is excellent in expandability. The multifunction system includes a controller, an IIT, an IOT, and a light distributing device. For a print job, print data outputted from the controller is converted into optical signals, which enter a light distributing device and are transmitted to the IOT of the emission side. The IOT prints the received data onto a printer. For a copy job, copy data outputted from IIT is converted into optical signals, which enter the light distributing device, and are transmitted to the IOT of the emission side. For a scan job, scan data outputted from the scanner is converted into optical signals, which enter the light distributing device, and are transmitted to the controller of the emission side. The controller processes the received data.

Multifunction system

A signal transmission system has a master node and plural slave nodes performing data transmission with the master node. The master node has a serial-to-parallel converter for converting a serial data signal from each slave node into a parallel data signal. Each slave node has a transmission aligner for performing word alignment processing upon a parallel data signals, and a parallel-to-serial converter for converting the parallel data signal subjected to the word alignment processing by the transmission aligner into a serial data signal, and outputting the serial data signal to the master node.

In an optical transmission apparatus in which a plurality of nodes are optically connected to one another via an optical transmission path, a light signal which is coded so that a mixture ratio of 1 and 0 constituting data is made close to 50% is transmitted through the optical transmission path. When a light signal is not emitted from all of the nodes, a dummy signal which is an AC-like signal is emitted to the optical transmission path. Therefore, an optoelectric conversion section can be always set to an active state, and the signal recognizability can be prevented from being lowered.

Optical transmission apparatus

An optical busoptically connects each board of a signal processing sectionand each board of a transmission/reception sectionfor transmitting an optical signal output to the optical busby each board of the signal processing sectionto each board of the transmission/reception sectionin a non-block state. In contrast, the optical bustransmits an optical signal output to the optical busby each board of the transmission/reception sectionto each board of the signal processing sectionin a non-block state.

Radio communication apparatus

In an optical wiring board, an optical components including a planar optical waveguide, a plurality of first optical fibers optically connected via a transmissive diffusion plate to a light incident face of the waveguide, and a plurality of second optical fibers optically connected to a light emitting face of the waveguide is placed on a support board. The optical component is sealed by a sealing member made of a resin.

Optical wiring board, optical bus system, and method of manufacturing optical wiring board

Master node #and a plurality of slave nodes #to #are connected to one another via a plurality of optical couplers. Each of the nodes is controlled so that signal transmission between the nodes by a bus connection and a link connection is conducted via the optical couplers. In the link connection, the master node transmits bit signals corresponding to the number of the slave nodes. Each of the slave nodes transmits a bit signal with allocating the signal to a predetermined bit.

A first optical wave guideand a second optical wave guideare connected to both sides of a planer optical waveguiderespectively. The other endsof the first and second optical wave guidesare extended over an upper surfaceof an optical wiring circuit board. An electric wiring circuitis connected to the other endsof the first and second optical wave guides, thereby constituting an optical wiring circuit. A plurality of optical wiring circuitsare superimposed on one another to thereby form an optical wiring circuits layered body. The electric wiring circuitcan be connected from one surface of the optical wiring circuit board, which makes it possible to facilitate the connection thereof.

Optical wiring circuit, optical wiring circuits layered body and opto-electric wiring apparatus

The invention relates to a multiprocessor system having plural processors and an optical bus shared by the plural processors, and intends to simplify the cache control, reduce the volume of hardware, and shorten the memory access processing time. For this purpose, the multiprocessor system of the invention includes a shared memory, a cache memory connected to the shared memory, an optical bus connected to the cache memory, and plural processors connected to the optical bus, which access to the cache memory through the optical bus.

Growing community of inventors

Kanagawa, Japan

Takeshi Kamimura