Fuji Electric Co., Ltd.

Denso Corporation

Nissan Motor Company Limited

Fuji Electric Device Technology Co., Ltd.

Jatco Corporation

Takeshi Fujii

Seiji Momota

Makoto Asai

Hitoshi Abe

Koh Yoshikawa

Masaki Koyama

Tetsutaro Imagawa

Takashi Shiigi

Takuro Inamoto

Mariko Sato

Yoshifumi Okabe

Satoshi Kamijima

Yoshinori Yamamoto

Michio Nemoto

Kenichiro Murakami

Yasushi Ookura

Tomoyuki Obata

Kouta Takahashi

Masaki Tamura

Shun Sugiura

Keizo Ishida

Kunihiko Okumura

Ko Yoshikawa

Between a source electrode () of a main device () and a current sensing electrode () of a current detection device (), a resistor for detecting current is connected. Dielectric withstand voltage of gate insulator () is larger than a product of the resistor and maximal current flowing through the current detection device () with reverse bias. A diffusion length of a p-body region () of the main device () is shorter than that of a p-body () of the current detection device (). A curvature radius at an end portion of the p-body region () of the main device () is smaller than that of the p-body () of the current detection device (). As a result, at the inverse bias, electric field at the end portion of the p-body region () of the main device () becomes stronger than that of the p-body region () of the current detection device (). Consequently, avalanche breakdown tends to occur earlier in the main devicethan the current detection device ().

Semiconductor device

In a surface layer of a rear surface of the semiconductor substrate, an n-type cathode region and a p-type cathode region are each selectively provided. The n-type cathode region and the p-type cathode region constitute a cathode layer and are adjacent to each other along a direction parallel to the rear surface of the semiconductor substrate. The n-type cathode region and the p-type cathode region are in contact with a cathode electrode. In an n-type drift layer, plural n-type FS layers are provided at differing depths deeper from the rear surface of the semiconductor substrate than is the cathode layer. With such configuration, in a diode, a tradeoff relationship of forward voltage reduction and reverse recovery loss reduction may be improved and soft recovery may be realized.

Semiconductor device having semiconductor regions with an impurity concentration distribution which decreases from a respective peak toward different semiconductor layers

Among trenches disposed in a striped-shape parallel to a front surface of a semiconductor substrate, a gate electrode at a gate potential is provided in a gate trench, via a gate insulating film; and in a dummy trench, a dummy gate electrode at an emitter electric potential is provided, via a dummy gate insulating film. Among mesa regions, in a first mesa region functioning as a MOS gate, a first p-type base region is provided in a surface region overall. In a second mesa region not functioning as a MOS gate, a second p-type base region is selectively provided at a predetermined interval, along a first direction. At least one of the trenches on each side of a mesa region is a gate trench and at at least one side wall of the gate trench, a MOS gate is driven. As a result, the ON voltage may be reduced.

Semiconductor device having semiconductor regions of different conductivity types provided at a predetermined interval along a first direction

A control device for an automatic transmission of a vehicle includes a shift control section including; a deceleration state judging section configured to judge whether a deceleration of the vehicle is a gentle deceleration state or a sudden deceleration state, and a downshift control section configured to command a plural stage downshift to downshift from a current shift stage of the automatic shift mechanism to a target shift stage that is lower than the current shift stage by two stages or more when the deceleration state judging section judges the sudden deceleration state.

Automatic gear changer control device and control method

Provided is a manufacturing method for manufacturing a SiC substrate having a flattened surface, including etching the surface of the SiC substrate by irradiating the surface of the SiC substrate with atomic hydrogen while the SiC substrate having an off angle is heated. In the etching, the SiC substrate may be heated within a range of 800&#xb0; C. or higher and 1200&#xb0; C. or lower.

Manufacturing method of SiC substrate

Providing a manufacture method of a gate insulating film formed on an SiC substrate having thereon an SiON film, achieving both of the maintenance of an SiON film structure and the formation of a high-quality insulating film. A manufacture method of a gate insulating film for an SiC semiconductor device comprises preparing a transfer plate comprising a transfer substrate and an insulating film formed thereon; preparing a surface-processed substrate comprising an SiC substrate and an epitaxial silicon oxynitride film as an atomic monolayer formed thereon; and transferring the insulating film from the transfer plate onto the silicon oxynitride film of the surface-processed substrate to produce the surface-processed substrate having a transferred insulating film.

Manufacture method of gate insulating film for silicon carbide semiconductor device

A method of manufacturing a silicon carbide semiconductor device having a contact formed between a p-type silicon carbide semiconductor body and a metal electrode, includes forming on a surface of the p-type silicon carbide semiconductor body, a graphene layer so as to reduce a potential difference generated in a conjunction interface between the p-type silicon carbide semiconductor body and the metal electrode; forming an insulator layer comprising a hexagonal boron nitride on a surface of the graphene layer; and forming the metal electrode on a surface of the insulation layer.

Method of manufacturing silicon carbide semiconductor device using graphene and hexagonal boron nitride

In a trench deeper than a thickness of a p-type base layer and configured by a first trench and a second trench, a second trench positioned at a lower portion is configured by a third trench and a fourth trench. A width of the second trench along an X direction is expanded more than the first trench positioned above the second trench. Along the X direction, the extent to which the second trench is expanded differs for the third trench and the fourth trench. Thus, a width of the lower portion of the trench differs along a Y direction, enabling reduced gate capacitance compared to uniform expansion along a transverse direction of the trench. Further, ON voltage may be reduced and switching capability may be improved.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device includes: a semiconductor substrate having an element; a front surface electrode connected to the element; a rear surface electrode connected to the element; a protective film disposed on the front surface of the semiconductor substrate in a separation region; and a temperature sensor disposed on a front surface side of the semiconductor substrate. The front surface electrode is divided into multiple pieces along at least two directions with the protective film. The separation region includes an opposing region located between opposing sides of divided pieces of the front surface electrode adjacent to each other, and an intersection region, at which the opposing region intersects. The temperature sensor is disposed in only the opposing region.

A semiconductor device includes a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type, disposed on a surface of the first semiconductor region, and having an impurity concentration higher than that of the first semiconductor region; a trench that penetrates the second semiconductor region to reach the first semiconductor region; a first electrode disposed inside the trench via an insulating film; a first recess portion disposed deeper than an upper end of the first electrode, in a surface layer of the second semiconductor region, so as to be in contact with the trench; and a second electrode embedded in the first recess portion.

Fabrication method of semiconductor device

Semiconductor device and fabrication method of semiconductor device

A method for manufacturing a semiconductor device is disclosed in which, after semiconductor function regions and patterns of interlayer insulating films including required contact holes are formed on one main surface side of a semiconductor substrate, an aluminum film or an aluminum alloy film which is thick is formed all over the main surface side of the semiconductor substrate and brought into conductive contact with the surface of the semiconductor substrate including bottom surfaces of the contact holes so as to form a required electrode film. Formation of the aluminum film or the aluminum alloy film is divided into a plurality of steps so that the thickness of the aluminum film or the aluminum alloy film is formed gradually, and between every two of the plurality of steps of forming the aluminum film or the aluminum alloy film, there is provided a step of performing isotropic etching to flatten irregularities in a surface of the aluminum film or the aluminum alloy film formed in the previous step. The method for manufacturing a semiconductor device prevents the formation of voids in the surface of an Al electrode film on the surface side of a semiconductor substrate.

Method for manufacturing semiconductor device

An IGBT is disclosed which separated into two groups (first and second IGBT portions). First and second Zener diodes each composed of series-connected Zener diode parts are disposed so as to correspond to the groups respectively. Each of the first and second Zener diodes has an anode side connected to a corresponding one of first and second polysilicon gate wirings, and a cathode side connected to an emitter electrode. Temperature dependence of a forward voltage drop of each of first and second Zener diodes is used for reducing a gate voltage of a group rising in temperature to throttle a current flowing in the group and reduce the temperature of the group to thereby attain equalization of the temperature distribution in a surface of a chip. In this manner, it is possible to provide an MOS type semiconductor device in which equalization of the temperature distribution in a surface of a chip or among chips can be attained.

Growing community of inventors

Matsumoto, Japan

Takeshi Fujii