Sumco Corporation

Industry-university Cooperation Foundation Hanyang University

Hanyang Hak Won Co., Ltd.

Takeo Katoh

Kazushige Takaishi

Katsuhiko Murayama

Tomohiro Hashii

Sakae Koyata

Takashi Nakayama

Jea Gun Park

Ryuichi Tanimoto

Eiji Kamiyama

Takeru Takushima

Shigeru Umeno

Shinichi Ogata

Un Gyu Paik

Shuhei Matsuda

Kazumi Tanabe

Won Mo Lee

Tetsuro Iwashita

Sung Jun Kim

Hyun Goo Kang

This method for manufacturing a silicon wafer includes: a first heat treatment step of performing RTP treatment on the silicon wafer in an oxidizing atmosphere; a step of removing a region in the silicon wafer in which an oxygen concentration increases in the first heat treatment step; a second heat treatment step of performing, after performing this removing step, RTP treatment on the silicon wafer in a nitriding atmosphere or an Ar atmosphere; and a step of removing, after performing the second heat treatment step, a region in the silicon wafer in which an oxygen concentration decreases in the second heat treatment step. This method enables the manufacture of a silicon wafer in which latent defects such as OSF nuclei and oxygen precipitate nuclei existing in a Pregion are destroyed or reduced, and that has a gettering site.

Silicon wafer and method for manufacturing the same

This invention is to provide a method of polishing a silicon wafer wherein a high flatness can be attained likewise the conventional polishing method and further the occurrence of defects due to the remaining of substances included in the polishing solution on the surface of the wafer can be suppressed as well as a polished silicon wafer. The method of polishing a silicon wafer by supplying a polishing solution containing abrasive grains onto a surface of a polishing pad and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, is characterized in that the number of abrasive grains included in the polishing solution is controlled to not more than 5&#xd7;10grains/cm.

Method of polishing a silicon wafer

A method for manufacturing an epitaxial wafer that can reduce occurrence of a surface defect or a slip formed on an epitaxial layer is provided. The manufacturing method is characterized by comprising: a smoothing step of controlling application of an etchant to a wafer surface in accordance with a surface shape of a silicon wafer to smooth the wafer surface; and an epitaxial layer forming step of forming an epitaxial layer formed of a silicon single crystal on the surface of the wafer based on epitaxial growth.

Method for manufacturing epitaxial wafer

An object of the present invention is to provide a method for etching a single wafer, which effectively realizes a high flatness of wafer and an increase in productivity thereof. In a method for etching a single wafer, a single thin disk-like wafer sliced from a silicon single crystal ingot is spun, and a front surface of the wafer is etched with an etching solution supplied thereto. In the method, a plurality of supply nozzles are disposed above and opposite to the front surface of the wafer at different portions in the radial direction of the wafer, respectively; and then one or more conditions selected from the group consisting of temperatures, kinds, and supply flow rates of etching solutions from the plurality of supply nozzles are changed.

Method for etching single wafer

A semiconductor wafer whose number of LPDs per wafer is equal to or smaller than a predetermined number is sorted out, and a judgment as to whether a semiconductor wafer is a non-defective wafer is made visually based on a haze map of the semiconductor wafer subjected to the sorting. Moreover, a semiconductor wafer whose number of LPDs per wafer is equal to or smaller than a predetermined number is sorted out. Then, from the semiconductor wafers subjected to the sorting, a semiconductor wafer whose in-plane standard deviation and in-plane average value of the haze signals in a wafer plane have a specific relationship is sorted out, and this semiconductor wafer is judged to be a non-defective wafer. In this way, a method for judging whether a semiconductor wafer is a non-defective wafer or a defective wafer, the method that can make a judgment more uniform and accurate without dependence on the difference in the S/N ratio between inspection apparatuses using a laser scattering method, is provided.

Method for judging whether semiconductor wafer is non-defective wafer by using laser scattering method

A silicon wafer is polished by applying a polishing solution substantially containing no abrasive grain onto a surface of a polishing pad having a given fixed grain bonded abrasive and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, wherein a hydroplane layer is formed by the polishing solution supplied between the surface of the silicon wafer and the surface of the polishing pad and a thickness of the hydroplane layer is controlled to change a polishing state of the surface of the silicon wafer.

Method of polishing silicon wafer

An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.

Apparatus for etching wafer by single-wafer process and single wafer type method for etching wafer

Disclosed is a method for smoothing the surface of at least one side of a wafer which is obtained by slicing a semiconductor ingot. In this method, a fluid is applied according to projections of the wafer surface, thereby reducing the projections. Alternatively, a fluid is applied over the wafer surface, thereby smoothing the entire surface of the wafer while reducing the projections in the wafer surface.

Method for smoothing wafer surface and apparatus used therefor

An object of the present invention is to provide a single wafer etching apparatus realizing a high flatness of wafers and an increase in productivity thereof. In the single wafer etching apparatus, a single thin disk-like wafer sliced from a silicon single crystal ingot is mounted on a wafer chuck and spun thereon, and an overall front surface of the wafer is etched with an etching solution supplied thereto by centrifugal force generated by spinning the wafer. The singe wafer etching apparatus includes a plurality of supply nozzlescapable of discharging the etching solutionfrom discharge openingsonto the front surface of the wafer, nozzle-moving devices each capable of independently moving the plurality of supply nozzles, and an etching solution supplying devicefor supplying the etching solutionto each of the plurality of supply nozzles and discharging the etching solutionfrom each of the discharge openings to the front surface of the wafer

Single wafer etching method

A slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect present on the surface of a wafer, and a method for planarizing the surface of a semiconductor device that utilizes the same are disclosed. The slurry composition of the present invention is aimed at compensating the nanotopography effect during chemical mechanical polishing process of the oxide layer formed on the surface of the wafer, and contains abrasive particles and an additive, wherein the size of the abrasive particles and the concentration of the additive are controlled within predetermined ranges in order to control the deviation of thickness (OTD) of the oxide layer below a certain level after the chemical mechanical polishing process.

Slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect and method for planarizing surface of semiconductor device using the same

A process for producing a silicon wafer comprising a single-wafer etching step of performing an etching by supplying an etching solution through a supplying-nozzle to a surface of a single and a thin-discal wafer obtained by slicing a silicon single crystal ingot and rotating the wafer to spread the etching solution over all the surface of the wafer; and a grinding step of grinding the surface of the wafer, in this order, wherein the etching solution used in the single-wafer etching step is an aqueous acid solution which contains hydrogen fluoride, nitric acid, and phosphoric acid in an amount such that the content of which by weight % at a mixing rate of fluoric acid:nitric acid:phosphoric acid is 0.5 to 40%:5 to 50%:5 to 70%, respectively.

Process for producing silicon wafer

This silicon wafer production process comprises in the order indicated a planarization step, in which the front surface and the rear surface of a wafer are ground or lapped, a single-wafer acid etching step, in which an acid etching liquid is supplied to the surface of the wafer while spinning and the entire wafer surface is etched to control the surface roughness Ra to 0.20 &#x3bc;m or less, and a double-sided simultaneous polishing step, in which the front surface and the rear surface of the acid etched wafer are polished simultaneously. The process may comprise a single-sided polishing step, in which the top and bottom of the acid etched wafer are polished in turn, instead of the double-sided simultaneously polishing step.

Method for manufacturing silicon wafers

The present invention provides a bonded substrate fabricated to have its final active layer thickness of 200 nm or lower by performing the etching by only 1 nm to 1 &#x3bc;m with a solution having an etching effect on a surface of an active layer of a bonded substrate which has been prepared by bonding two substrates after one of them having been ion-implanted and then cleaving off a portion thereof by heat treatment. SC-1 solution is used for performing the etching. A polishing, a hydrogen annealing and a sacrificial oxidation may be respectively applied to the active layer before and/or after the etching. The film thickness of this active layer can be made uniform over the entire surface area and the surface roughness of the active layer can be reduced as well.

Growing community of inventors

Tokyo, Japan

Takeo Katoh