Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Renesas Technology Corp.

Other

Asahi Glass Company, Limited

Takeo Ishibashi

Toshiyuki Toyoshima

Takayuki Saito

Shuji Nakao

Ayumi Minamide

Maya Itoh

Keiichi Katayama

Naoki Yasuda

Takuya Hagiwara

Mamoru Terai

Yoshiharu Ono

Kanji Sugino

Mikihiro Tanaka

Masahiro Tadokoro

Teruhiko Kumada

Hideharu Nobutoki

Yoko Takebe

Yuki Miyamoto

Osamu Yokokoji

Eiichi Ishikawa

Junjiro Sakai

Tetsuro Hanawa

Kazumasa Yonekura

Toshifumi Suganaga

Kazunori Yoshikawa

Tadashi Miyagi

Yoshika Kimura

Takayuki Shoya

Miwako Ishibashi, Legal Representative

Itaru Kanai

A developing method for immersion lithography is provided, realizing a process that is simple and low-cost and enables high repellency sufficient to allow high-speed scanning. The developing method for immersion lithography improved by inexpensive material without introducing any new facility, a solution to be used in the developing method, and an electronic device formed by using the developing method are provided. The developing method for immersion lithography is a method of developing for immersion lithography of an electronic device with a resist containing a surface segregation agent and chemically-amplified resist, including the step of development with alkali immersion, characterized by the dissolving and removing step, conducted using a dissolving and removing solution that selectively dissolves and removes the surface segregation agent of the resist.

Developing method for immersion lithography, solvent used for the developing method and electronic device using the developing method

It is an object of the present invention to provide a water repellant composition for a substrate to be exposed which inhibits the back side of a substrate to be exposed from being contaminated by an immersion liquid, can improve adhesion between a film to be processed and an organic film directly overlying that film to inhibit film peeling, and has excellent workability, a method for forming a resist pattern, an electronic device produced by the formation method, a treatment method for imparting water repellency to a substrate to be exposed, a water repellent set for a substrate to be exposed, and a treatment method for imparting water repellency to a substrate to be exposed using the same. A water repellent composition for a substrate to be exposed including at least an organosilicon compound represented by the following general formula (1) and a solvent is used.  In the formula, Ris a monovalent organic group having 14 to 30 carbon atoms, each R, R, and Ris independently a monovalent organic group or a hydrolyzable group having 1 to 10 carbon atoms, and at least one of R, R, and Ris a hydrolyzable group.

Water repellant composition for substrate to be exposed, method for forming resist pattern, electronic device produced by the formation method, treatment method for imparting water repellency to substrate to be exposed, water repellant set for substrate to be exposed, and treatment method for imparting water repellency to substrate to be exposed using the same

It is an object of the present invention to provide a method of manufacturing a semiconductor device that reduces the deterioration in processed configuration and the pattern roughness of a film to be processed, and is close to the original design and applicable to a dual damascene step and the like. The manufacturing method comprises a processing mask layer forming step of forming a processing mask layer (a lower organic film and a middle layer) comprising at least one film, and hardening treatment for at least one film of the processing mask layer by applying a film and heat hardening treatment; a processing mask layer etching step of applying a resist film for exposure to the processing mask layer, exposing and developing it to form a resist pattern, and etching the processing mask layer using the resist pattern as a mask; and a film to be processed etching step of etching the film to be processed using the pattern of the processing mask layer formed at the processing mask layer etching step as a mask.

Manufacturing method of semiconductor device

First, a first exposure process is performed using dipole illumination with only a grating-pattern forming region as a substantial object to be exposed. Next, a second exposure process is performed with only a standard-pattern forming region as a substantial object to be exposed. A development process is then performed to obtain a resist pattern. A mask for the first exposure process is such that a light blocking pattern is formed on the whole surface of a standard-pattern mask part corresponding to the standard-pattern forming region. A mask for the second exposure is such that a light blocking pattern is formed on the whole surface of a grating-pattern mask part corresponding to the grating-pattern forming region.

Pattern forming method, semiconductor device manufacturing method and exposure mask set

An insulating film is formed on a main surface of a substrate. A conductive film is formed on the insulating film. A lower layer resist film, an intermediate layer, an anti-reflection film and an upper layer resist film are formed on the conductive film. A focal point at a time of exposure is detected by detecting a height of the upper layer resist film. In detecting the focal point at the time of exposure, a focal point detection light is radiated on the upper layer resist film. After detecting the focal point, the upper layer resist film is exposed and developed thereby to form a resist pattern. With the resist pattern as a mask, the intermediate layer and the anti-reflection film are patterned, and the lower layer resist film is developed. With these patterns as a mask, the conductive film is etched thereby to form a gate electrode.

Method of fabricating semiconductor device

The present invention improves the OPE characteristic generated by the difference between sparse and dense mask patterns and promotes fidelity in the design of the pattern. Because of this, the present invention includes a step of forming a resist having an acid dissociative dissolution suppression group on a substrate, a step of coating the resist with an acid polymer dissolved in an alcohol based solvent and forming an upper layer film, a step of exposing through a mask, a step of performing a baking process, and a step of processing with an alkali developer, and wherein in the step of performing a baking process, a mixing layer is formed on the resist by the upper layer film and in which a thicker mixing layer is formed in an unexposed part of a region where the pattern density of the mask pattern is high compared to a region where the pattern density is low.

Method of forming resist pattern and method of manufacturing semiconductor device

A via-filling material includes a polymer containing a repeating unit represented bywherein Rone of hydrogen, fluorine, chlorine, bromine, and methyl group; Ris one of hydrogen, a Calkyl group, and a Calkyl group in which the hydrogen is replaced by at least one of fluorine, chlorine, and bromine; and X is &#x2014;C(&#x2550;O)O&#x2014; or &#x2014;S(&#x2550;O)O&#x2014;. This via-filling material does not generate deposits around an opening of a via hole during plasma etching and provides a semiconductor integrated circuit with high reliability, even when a trench wider than the via hole is formed by plasma etching around the via hole filled with the via-filling material.

Via-filling material and process for fabricating semiconductor integrated circuit using the material

A method for forming resist patterns, and an overlying layer material and a semiconductor device used in the method for forming resist patterns, which can improve the dimensional uniformity of resist patterns by inhibiting the multiple interference of light beams within a resist film; improve the environmental resistance in a clean room or the like; and obtain resist patterns having rectangular sectional shapes by preventing the acid in the overlying layer material from diffusing into the resist. By using an overlying layer material containing a water-soluble low-molecular-weight acidic substance and a water-soluble photo base generator preventing the diffusion of the acidic substance into the resist, the base formed after exposure neutralizes the acids contained in the overlying layer material in nature, and the diffusion of the acid into the resist can be inhibited. As a result, since the elimination group of the protective group of the polymer on the surface of the resist is inhibited, and the cross-linking reaction in the resist can be inhibited, resist patterns having rectangular sectional shapes can be obtained.

Method for forming resist pattern, and overlying layer material and semiconductor device used for forming resist pattern

A first resist layer, capable of generating an acid, is formed on a semiconductor base layer and is developed in a shortened developing time than usual. The first resist pattern is covered with a second resist layer containing a material capable of crosslinkage in the presence of an acid. The acid is generated in the first resist pattern by application of heat or by exposure to light, and a crosslinked layer is formed in the second resist pattern at the interface with the first resist pattern as a cover layer for the first resist pattern, thereby the first resist pattern is caused to be thickened. The non linked portion of the second resist layer is removed and the fine resist pattern is formed. Thus, the hole diameter of the resist pattern can be reduced, or the isolation width of a resist pattern can be reduced.

Method of manufacturing a semiconductor device having an improved fine structure

There is provided a method of forming a fine pattern comprising the steps of: forming a work film to be processed on a substrate; forming a hard mask film which has a different etching rate from the work film and can serve as a mask to the work; forming a first resist pattern on the hard mask film by lithography; forming a hard mask pattern by etching a first section which is not covered with the first resist pattern till the upper surface of the work film is exposed; removing the first resist pattern; forming a second resist pattern on the hard mask pattern by lithography; etching a second section which is not covered with the second resist pattern by isotropic etching; removing the second resist pattern; and etching the work film through the hard mask pattern as a mask, partially subjected to the isotropic etching. This method enables to prevent the whole remaining patterns from shrinking even when fine patterns beyond the resolving power in lithography technologies are formed.

Fine pattern formation method and semiconductor device or liquid crystal device manufacturing method employing this method

A resist pattern, containing a material capable of generating an acid by exposure to light, is covered with a resist containing a material capable of crosslinkage in the presence of an acid. The acid is generated in the resist pattern by application of heat or by exposure to light, and a crosslinked layer is formed at the interface as a cover layer for the resist pattern, thereby causing the resist pattern to be thickened. Thus, the hole diameter of the resist pattern can be reduced, or the isolation width of a resist pattern can be reduced.

Material for forming a fine pattern and method for manufacturing a semiconductor device using the same

First, a hole pattern or a separation pattern of a first resist that is capable of supplying acid is formed on a semiconductor substrate. Then, a crosslinked film (organic frame) is formed on the side wall of the first resist pattern to obtain a resist pattern having a reduced hole diameter or separation width. Then, the hole diameter or the separation width is further reduced by causing thermal reflow of the crosslinked film. Finally, the semiconductor substrate is etched by using a resulting resist pattern as a mask.

Growing community of inventors

Tokyo, Japan

Takeo Ishibashi