Hitachi, Ltd.

Renesas Technology Corp.

Other

Hitachi Ulsi Systems Co., Ltd.

Takenobu Ikeda

Masahiro Tadokoro

Shinji Kuniyoshi

Kazuo Yamazaki

Kousuke Kusakari

Masaru Izawa

Masayuki Kojima

Takashi Yunogami

Masahiro Shioya

To improve the shape of a gate electrode having SiGe, after patterning a gate electrodeG having an SiGe layerby a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHFgas. Thereby, the gate electrodeG can be formed without causing side etching at two side faces (SiGe layer) of the gate electrodeG.

Fabrication method for semiconductor integrated circuit device

A fabrication method of a semiconductor integrated circuit device comprises, in an SAC process or HARC process, subjecting a semiconductor substrate to plasma etching to make contact holes in an oxide film made of a silicon oxide film formed on the semiconductor substrate. For improving the ease-in-etching property of the silicon oxide film and selectivity to a nitride film, a residence time of an etching gas within a chamber is so set as to be in a range where selectivity to an insulating film made of silicon nitride is improved by using etching conditions of a low pressure and a large flow rate of the etching gas of CH/O/Ar.

Fabrication method of semiconductor integrated circuit device

To improve the shape of a gate electrode having SiGe, after patterning a gate electrode G having an SiGe layer by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF gas. Thereby, the gate electrode G can be formed without causing side etching at two side faces (SiGe layer ) of the gate electrode G.

Fabrication method for semiconductor integrated circuit devices and semiconductor integrated circuit device

A hole is formed on an insulating film made of silicon oxide by selectively plasma-etching the insulating film with an etching gas containing C F , O , and Ar firstly under a condition in which the deposition property of a polymer layer is weak and secondly under a condition in which that of the polymer layer is strong.

Method of manufacturing a semiconductor integrated circuit device

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Ome, Japan

Takenobu Ikeda