Nec Electronics Corporation

Renesas Electronics Corporation

Takekazu Tanaka

Kouhei Takahashi

Seiji Okabe

Ikuo Komatsu

Yukinori Tabira

A semiconductor device includes an electrode pad provided on a semiconductor chip, the electrode pad includes aluminum (Al) of between 50% wt. and 99.9% wt. and further includes copper (Cu), a coupling ball that primarily includes Cu, the coupling ball being coupled to the electrode pad so that a CuAllayer, a CuAl layer, a layer including one of CuAland CuAl, and the coupling ball are vertically stacked in this order on the electrode pad, and an encapsulating resin that includes a halogen of less than or equal to 1000 ppm, the encapsulating resin covering at least the electrode pad and a junction between the electrode pad and the coupling ball.

Semiconductor device

A semiconductor device includes an electrode pad provided on a semiconductor chip, in which the electrode pad includes aluminum (Al) as a major constituent and further including copper (Cu), a coupling ball primarily including Cu, the coupling ball is coupled to the electrode pad such that a plurality of layers of Cu and Al alloys are formed at a junction between the electrode pad and the coupling ball, and an encapsulating resin including a halogen of less than or equal to 1000 ppm, the encapsulating resin covering at least the electrode pad and the junction between the electrode pad and the coupling ball. A dimensional area of the plurality of layers of Cu and Al alloys is equal to or larger than 50% of a dimensional area of the junction between the electrode pad and the coupling ball. The plurality of layers of Cu and Al alloys includes a CuAllayer, a CuAl layer formed on the CuAllayer, and a layer including one of CuAland CuAlformed on the CuAl layer.

Semiconductor device including coupling ball with layers of aluminum and copper alloys

A semiconductor device and a manufacturing method for preventing mechanical and thermal damage to the semiconductor chip. A laser beam welds a first connection pad formed on a first external lead to a first electrode formed on the surface of the semiconductor chip. A first connection hole is formed in the first connection pad, and the first connection hole overlaps the first connection electrode. A laser beam irradiates an area including the first connection hole, and the first connection pad in a portion around the first connection hole is melted to form a melting section, that is welded to the first connection electrode to easily form a semiconductor device with more excellent electrical characteristics.

Semiconductor device with welded leads and method of manufacturing the same

A semiconductor device includes a semiconductor chip, an electrode pad provided in the semiconductor chip, in which the electrode pad includes Al as a major constituent and further includes Cu, a coupling member coupled to the electrode pad, in which the coupling member primarily includes Cu, a plurality of layers of Cu and Al alloys formed between the electrode pad and the coupling member, and an encapsulating resin that includes a halogen of less than or equal to 1000 ppm, in which the encapsulating resin encapsulates the semiconductor chip, the electrode pad, and the coupling member. The plurality of layers of Cu and Al alloys includes a CuAllayer formed on the electrode pad, a CuAl layer formed on the CuAllayer, and a layer including one of CuAland CuAlformed on the CuAl layer.

A method of manufacturing a semiconductor apparatus includes forming an electrode on a semiconductor device, forming a conductive bump on the electrode, placing an external wire on the conductive bump, and laser-welding the external wire and the conductive bump to establish electrical connection.

Method of manufacturing semiconductor apparatus

An improved reliability in a region of a junction between a bonding wire and an electrode pad at higher temperature is achieved. A semiconductor deviceincludes a semiconductor chip, AlCu pads, which are provided in the semiconductor chipand which contain Al as a major constituent and additionally contain copper (Cu), and CuP wires, which function as coupling members for connecting inner leadsprovided outside of the semiconductor chipwith the semiconductor chip, and primarily contain Cu. The AlCu padsand the CuP wiresare encapsulated with an encapsulating resinthat contains substantially no halogen.

Semiconductor device including a coupling region which includes layers of aluminum and copper alloys

The semiconductor apparatus includes a semiconductor chip, and a source electrode and a gate electrode which are formed on the semiconductor chip and electrically connected with a lead frame. The source electrode is electrically connected with the lead frame by being laser-welded with a thin-film shaped connecting portion formed at an end of the lead frame. This enables the provision of a semiconductor apparatus with enhanced productivity and yields which exhibits high electrical operability and reliability.

Semiconductor apparatus manufacturing method

A technology providing an improvement in the durability in the condition of changing the temperature, while ensuring characteristics such as the applicability to applications utilizing larger electric current, lower resistance and the like can be achieved. A semiconductor deviceincludes a ceramic multiple-layered interconnect substrate, a silicon chipthat is flip-bonded to a chip-carrying region of the ceramic multiple-layered interconnect substrate, and an external connecting bumpsand an external connecting bumps, which are provided in the side that the silicon chipof the ceramic multiple-layered interconnect substrateis carried. The silicon chipincludes a front surface electrode and a back surface electrode. The ceramic multiple-layered interconnect substrateincludes an interconnect layer composed of a conductive material, and the interconnect layer composes a multiple-layered interconnect layer provided on a front surface and in an interior of the ceramic multiple-layered interconnect substrate. The front surface electrode of the silicon chip is electrically connected to the external connecting bumpand the external connecting bumpthrough the multiple-layered interconnects in the multiple-layered interconnect layer.

A package for an electronic component including a chip mounting area mounting a semiconductor chip in a hollow part of a metal plate and a plurality of connection electrodes to be connected to a substrate. The plurality of connection electrodes are formed in opposite sides of the rectangular metal plate and arranged asymmetrically with respect to a perpendicular bisector of the opposite sides.

Electronic package and semiconductor device using the same

In a semiconductor package including at least one plate-like mount, a semiconductor chip has at least one electrode formed on a top surface thereof, and is mounted on the plate-like mount such that a bottom surface of the semiconductor chip is in contact with the plate-like mount. The semiconductor package also includes at least one lead element having an outer portion arranged to be flush with the plate-like mount, and an inner portion deformed and shaped to overhang the semiconductor chip such that an inner end of the lead element is spaced apart from the top surface of the semiconductor chip. The semiconductor package further includes a bonding-wire element bonded at ends thereof to the electrode of the semiconductor chip and the inner end of the lead element, an enveloper sealing and encapsulating the plate-like mount, the semiconductor chip, the inner portion of the lead element, and the bonding-wire element.

Production process for manufacturing such semiconductor package

A package for an electronic component according to one embodiment of the invention has a chip mounting area mounting a semiconductor chip in a hollow part of a metal plate and a plurality of connection electrodes to be connected to a substrate. The plurality of connection electrodes are formed in opposite sides of the rectangular metal plate and arranged asymmetrically with respect to a perpendicular bisector of the opposite sides.

A leadless type semiconductor package includes a plate-like mount, and at least one semiconductor chip mounted on the plate-like mount such that a bottom surface of the semiconductor chip is secured to the plate-like mount, and the semiconductor chip has at least one electrode pad formed on a top surface thereof. The package further includes at least one flat electrode electrically connected to the electrode pad, and a molded resin enveloper for completely sealing and encapsulating the semiconductor chip. The molded resin enveloper further partially seals and encapsulates the flat electrode such that a part of the flat electrode is exposed as an outer electrode pad on a top surface of the molded resin enveloper.

Leadless type semiconductor package, and production process for manufacturing such leadless type semiconductor package

A lead frame of the present invention includes a pair of base portions having a substantially flat bottom each. An island portion and electrode portions are partly connected to the tops of the base portions. The lead frame needs a minimum of production cost and promotes dense mounting of semiconductor devices to a circuit board.

Growing community of inventors

Kanagawa, Japan

Takekazu Tanaka