Fujitsu Corporation

Takekazu Tabata

Yasunobu Akizuki

Ryohei Okazaki

Sota Sakashita

A calculation processing apparatus includes a decoder that decodes memory access instructions including a store instruction and a load instruction; a first queue that stores the decoded memory access instructions; a second queue that stores store data related to the store instruction; a storage circuit that stores target address information of the store instruction for which the first queue is reserved but the second queue is not reserved; and an inhibitor that inhibits execution of the load instruction when address information matching target address information of the load instruction is stored in the storage circuit when the load instruction is being processed. This configuration inhibits switching of the order of a store instruction and a load instruction.

Inhibiting load instruction execution based on reserving a resource of a load and store queue but failing to reserve a resource of a store data queue

A first entry, when outputting an instruction stored in the first entry to a first arithmetic unit and when an execution cycle number of the instruction stored in the first entry is equal to or more than a threshold value, outputs a use inability signal of the first arithmetic unit to a second entry, a reservation station includes a controller configured to, when the use inability signal of the first arithmetic unit is output and then a use inability discontinuation condition is satisfied, perform control to discontinue execution of the first arithmetic unit, store a state of the first arithmetic unit in a storage element, and discontinue output of the use inability signal of the first arithmetic unit, and the second entry, when output of the use inability signal of the first arithmetic unit is discontinued, outputs an instruction stored in the second entry to the first arithmetic unit.

Multi-threaded processor interrupting and saving execution states of complex instructions of a first thread to allow execution of an oldest ready instruction of a second thread

Growing community of inventors

Kawasaki, Japan

Takekazu Tabata