Advanced Display, Inc.

Kabushiki Kaisha Advanced Display

Takehisa Yamaguchi

Takafumi Hashiguchi

Akio Nakayama

Hironori Aoki

Naoki Nakagawa

Shigeaki Noumi

Ken Nakashima

Hiroshi Ueda

Hitoshi Morishita

Hirofumi Iwanaga

Yoshimitsu Ishikawa

An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiringfor inputting a signal and a power supply to a driving ICCOG-packaged on a first insulating substratefirst layer internal wiringis composed of a first conductive film forming a scanning line, etc., and second layer internal wiringis composed of a second conductive film forming a signal line, etc. Connecting wiringfor connecting the first layer internal wiringand the second layer internal wiringis formed simultaneously with formation of a display electrode, and the internal wiringis formed into a multi-layer structure connected electrically parallel.

Image display and manufacturing method thereof having particular internal wiring structure

The display device includes the lead line connected to pixels, the line terminal connected to the lead line and connected to the terminal of the drive circuit mounted directly on the insulating substrate by the conductive material through the transparent conductive film, the external terminal to be connected to an external unit, an external line connected to the external terminal, and an external line terminal connected to the external line and connected directly to the terminal of the drive circuit by the conductive material. The surface of the line terminal to be connected to the transparent conductive film is formed by the high resistance conductive film, and the surface of the external line terminal to be connected to the terminal of the drive circuit by the conductive material is formed by the low resistance conductive film.

Display device having a terminal that has a transparent film on top of a high resistance conductive film

A high-precision patterning is conducted with a half-tone resist thickness being prevented from varying due to the presence/absence of a base film. A transmitting portion and two kinds of semi-transmitting portions, providing different quantities of transmitted light, are provided in a photomask for exposing a resist, and a smaller-transimitting-light-quantity semi-transmitting portion is used in a base film-present area and a large-transmitting light-quantity semi-transmitting portion is used in a base-film-free area to regulate luminous exposure while exposing, thereby forming a half-tone resist having uniform thickness.

Method of patterning a thin film transistor that includes simultaneously forming a gate electrode and a pixel electrode

An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiringfor inputting a signal and a power supply to a driving ICCOG-packaged on a first insulating substrate, first layer internal wiringis composed of a first conductive film forming a scanning line, etc., and second layer internal wiringis composed of a second conductive film forming a signal line, etc. Connecting wiringfor connecting the first layer internal wiringand the second layer internal wiringis formed simultaneously with formation of a display electrode, and the internal wiringis formed into a multi-layer structure connected electrically parallel.

Image display having internal wiring with multi-layer structure and manufacturing method thereof having particular wiring connection

The widths of those portions of a semiconductor layerand a drain lineoverlapping with it which cross an edge line of a gate electrodeare made smaller than the channel width of a thin-film transistor. With this measure, the overlap area of the gate electrodeand a drain electrodeis reduced. As a result, a variation of the above overlap area due to alignment errors in a photolithography apparatus used in patterning the gate linesthe drain electrodesand source electrodescan be reduced and the frequency of occurrence of display defects can be decreased.

TFT array substrate and liquid crystal display device using it

The widths of those portions of a semiconductor layer and a drain line overlapping with it which cross an edge line of a gate electrode are made smaller than the channel width of a thin-film transistor. With this measure, the overlap area of the gate electrode and a drain electrode is reduced. As a result, a variation of the above overlap area due to alignment errors in a photolithography apparatus used in patterning the gate lines , the drain electrodes , and source electrodes can be reduced and the frequency of occurrence of display defects can be decreased.

TFT array substrate, and liquid crystal display device using the same

A TFT of the present invention includes an insulating substrate, a first conductive film layer which is to be a gate electrode provided on the insulating substrate, a first insulating film layer which is to be a gate insulating film layer provided on the first conductive film layer, a non-doped semiconductor layer formed on the first insulating film layer, and a second conductive film layer which is to be a source electrode formed on a source region of the semiconductor layer and a drain electrode formed on a drain region of the semiconductor, wherein a junction is formed by implanting an n-type impurity in the source region of the semiconductor layer and the drain region of the semiconductor.

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Kumamoto, Japan

Takehisa Yamaguchi