Other

Renesas Technology Corp.

Hitachi Ulsi Systems Co., Ltd.

Akita Electronics Systems Co., Ltd.

Takehiro Ohnishi

Asao Nishimura

Akira Nagai

Kunihiro Tsubosaki

Masahiko Ogino

Shuji Eguchi

Chuichi Miyazaki

Yukiharu Akiyama

Tomoaki Kudaishi

Hiroshi Koyama

Noriou Shimada

Ichiro Anjo

Masanori Shibamoto

Kunihiko Nishi

Hideki Tanaka

Ichiro Anjoh

Akio Hasebe

Mitsuaki Katagiri

Ryosuke Kimoto

Yuji Shirai

Masnori Shibamoto

A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

Semiconductor device and manufacturing method thereof

A semiconductor wafer which has finished formation of a relocating wiring layer thereon is stored and after determination of a design, solder bumps are formed over bump lands (one end of the relocating wiring layer) in accordance with a pattern which differs with a design, whereby a function or characteristic depending on the design is selected. The semiconductor wafer is then cut into a plurality of semiconductor chips, whereby a wafer level CSP is available.

Semiconductor integrated circuit device and its manufacturing method

A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.

Semiconductor device and its manufacturing method

Semiconductor device with elastic structure and wiring

Semiconductor device with chip size package

Growing community of inventors

Higashimurayama, Japan

Takehiro Ohnishi