Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Takehiro Ochi

Takayuki Igarashi

Hisao Kobashi

Tomohiko Aika

Reliability of a semiconductor device is improved. The semiconductor device includes a silicon pattern for a fuse element, a metal silicide layer formed on an upper surface and a side surface of the silicon pattern, a gate electrode for MISFET, and a metal silicide layer formed on an upper surface of the gate electrode. The height from the lower surface of the silicon pattern to the lower end of the metal silicide layer is lower than the height from the lower surface of the gate electrode to the lower end of the metal silicide layer.

Semiconductor device and method of manufacturing the same

A switching circuit between a main circuit and a redundant circuit in a semiconductor device is disclosed. The redundant circuit replaces the main circuit by blowing a fuse. But a nullifying means can nullify blowing of the fuse, if needed. A switching element connected in parallel with the fuse and a control means enable nullification. The control means turn on the switching element to ascertain whether nullification is effective, and fix the nullification by blowing a fuse in the control means.

Switching circuit and semiconductor device

A redundancy row decoder in a DRAM includes a plurality of N channel MOS transistors connected in series between one terminal of each fuse and a line of a ground potential, the plurality of N channel MOS transistors having their gates receiving a predecode signal allocated to a corresponding word line. As compared with a conventional case where only one N channel MOS transistor is connected between one terminal of each fuse and the line of the ground potential, leakage current flowing through each fuse is made smaller.

Growing community of inventors

Tokyo, Japan

Takehiro Ochi