Hitachi, Ltd.

Renesas Technology Corp.

Takehiko Hasebe

Akio Hasebe

Hiroshi Hozoji

Masahide Harada

Eiji Matsuzaki

Nobuyuki Ushifusa

Yasunori Narizuka

Susumu Kasukabe

Takehide Yokozuka

Yasushi Goto

Yasuhiro Motoyama

Akira Yabushita

Yuji Wada

Terutaka Mori

Teruo Shoji

Masakazu Sueyoshi

Makoto Torigoe

Yoshihide Yamaguchi

Yoshiaki Yazawa

Kouichi Uesaka

Hidetaka Shigi

Kiyoko Yamanaka

Tetsuya Yamazaki

Masashi Nishiki

Yukio Maeda

Naoya Kitamura

Masayuki Kyooi

Yasuko Yamada

Provided is a valuable-metal recovery method for recovering metals from lithium ion batteries using comparatively simple equipment and without using a cumbersome process. In said method, a positive electrode material from lithium ion batteries, containing lithium and a transition metal, is dissolved in an acidic solution, thereby generating lithium ions and ions of the transition metal in the acidic solution. Said acidic solution and a recovery liquid are then made to flow with an anion-permeable membrane interposed therebetween, causing the lithium ions to permeate from the acidic solution to recovery solution. Lithium ions are then recovered from the recovery liquid containing dissolved lithium ions.

Metal recovery method and dialysis device

An actuator using a piezoelectric element is stably operated at high speed. The actuator includes driving units provided to face a carrier stage and moving the carrier stage in an X-axis direction, piezoelectric elements provided to the driving units respectively and expanding and contracting in the X-axis direction, a carrier electrode provided on a surface of the carrier stage on a driving-unit side, and driving electrodes provided on surfaces of the driving units on a carrier stage side and electrostatically adsorbing the carrier electrode. Signals not synchronized with each other are applied to the piezoelectric elements.

Actuator system

The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.

Electronic apparatus

The present invention intends to prevent the communication distance from becoming shorter with a reduction in size of a coil antenna to the chip size and with a consequent decrease of an induced voltage. According to the present invention there is provided a semiconductor chip having a coil antenna and a circuit surface and adapted to transmit and receive signals by radio to and from an external device. The semiconductor chip has a configuration for increasing an electromagnetic coupling coefficient between the coil antenna and the external device. According to a concrete example thereof, a magnetic material is disposed, the coil antenna is formed by a stacked structure comprising plural conductor layers and insulating layers superimposed one on another, or the coil antenna is disposed outside an external form of a circuit of the semiconductor chip.

Semiconductor chip with coil antenna and communication system

The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

Fabrication method of semiconductor integrated circuit device

A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropically etched hole in a crystalline substrate, and a semiconductor device test method (fabrication method) using the probe card.

Probe sheet, probe card, semiconductor test equipment and semiconductor device fabrication method

A multi-layer wiring substrate capable of high density packaging, and a method of manufacturing the same, in which a carrier substrate, in which through holes can be easily formed in high density corresponding substantially to a pitch of connecting terminals in a semiconductor chip, and build-up layers are formed on the substrate with the application of a conventional build-up technique. When the build-up technique for repeatedly forming insulating layers and wiring layers on a carrier substrate is used to manufacture a multi-layer wiring substrate, the carrier substrate is formed in the following manner. First, an insulating resin layer is formed in a copper foil, in which a plurality of first windows are regularly provided, to cover the copper foil, and the resin layer fills the interior of the windows. Subsequently, second windows of a particular shape are provided in regions of layers of the insulating resin filled in the windows, and independent conducting paths are formed through the second windows to extend from front sides of the second windows to back sides thereof. The conducting paths are formed radially to be spaced a substantially equal distance from centers of the respective second windows.

Multi-layer wiring substrate and manufacturing method thereof

Growing community of inventors

Yokohama, Japan

Takehiko Hasebe