Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Takeaki Watanabe

Hiroshi Komori

Noriaki Saito

Yoshito Shimizu

Masatoshi Igarashi

Takahiro Shima

An injection locked frequency divider includes a ring oscillator, an input terminal, an output terminal and a control voltage terminal. The ring oscillator has a three-stage cascade connection of a first amplification circuit including an N-channel MOS type transistor and P-channel MOS type transistors, a second amplification circuit configured in the same manner as the first amplification circuit and a third amplification circuit configured likewise. A high frequency signal is input to a gate terminal of each P-channel MOS type transistor. A predetermined DC control voltage is supplied to a gate terminal of each P-channel MOS type transistor.

Injection locked oscillator

A receiving apparatus includes an amplification section that amplifies a received signal and a frequency conversion section that converts a frequency of the received signal, from a radio frequency to a baseband, the baseband having a lower frequency than the radio frequency. A gain control section amplifies, by a predetermined gain, the signal that has been subjected to the frequency conversion to the baseband. A voltage calibration section performs calibration on an offset voltage generated in the signal subjected to frequency conversion to the baseband. A time constant control section sets a first time constant during a reception operation and sets a second time constant, which is reduced with respect to the first time constant, during the calibration. A filter section passes a received signal of a predetermined band, with the first time constant or the second time constant, an operation control section stops operation of the amplification section during the calibration, controls the amplification section to operate during the reception operation, and controls the operation of the amplification section so as to reduce a residual offset voltage caused by switching the operation of the amplification section.

Reception apparatus and reception method

A frequency mixer device is provided with a mixer circuit having an input cell that amplifies an input signal and a switching cell that mixes the amplified input signal with a switching signal and outputs a multiplied signal, and a DC offset compensator that detects the input level of the input signal and outputs a compensation signal based on that detection signal, the compensation signal being supplied to the mixer circuit so as to compensate a DC offset included in the multiplied signal. The compensation signal that the DC offset compensator outputs is added to the output signal of the input cell so as to compensate the DC offset. Low frequency noise included in the compensation signal is converted to a frequency near that of the switching signal, and does not range over the desired waveband of the mixer output.

Frequency mixer device and method for compensating DC offset

A reception apparatus capable of calibrating a DC offset voltage fast and with high accuracy even in an environment in which interferer exist without causing noise characteristic degradation. In this apparatus, a digital signal processing section () controls the gain of a received signal at such a gain that predetermined reception quality is obtained. A time constant control circuit () controls the time constant and makes the amount of attenuation of the received signal of a low pass filter () more moderate compared to the case where a DC offset voltage is not calibrated during DC offset voltage calibration. A voltage calibration circuit () calibrates the DC offset voltage generated in the received signal when controlling the gain. A second decoder () compares the gain during gain control with a threshold and instructs an operation control circuit () to set a high-frequency circuit () in a non-operating state when the gain during gain control is equal to or above the threshold and set the high-frequency circuit () in an operating state when the gain during gain control is less than the threshold.

A direct conversion receiver includes a mixer for converting an RF signal into a baseband signal, a dynamic DC offset compensator for compensating for a dynamic DC offset caused by the effect of second order nonlinear distortion of the mixer on an interfering wave that enters the input terminals of the mixer, and a static DC offset compensator for compensating for a static DC offset caused by self-mixing of a local signal and a leakage component of the local signal that appears at the input terminals of the mixer. The static DC offset compensation starts at a time tafter a DC offset compensation operation has started. The static DC offset compensation is finished at the next time t, and then the dynamic DC offset compensation starts. The dynamic DC offset compensation is finished at the next time t. With this configuration, only a change in DC offset due to the dynamic DC offset is compensated after compensating for the static DC offset component. The dynamic DC offset compensator does not have an element for storing the magnitude of the static DC offset.

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Kyoto, Japan

Takeaki Watanabe