Hitachi, Ltd.

Hitachi Information Technology Co., Ltd.

Takayuki Uda

Takahiro Daikoku

Tasuku Tanaka

Kenichi Kasai

Ryo Yamagata

Kazuhisa Miyamoto

Toshitada Netsu

Masahide Harada

Masanori Odaka

Nobuo Tamba

Toshiro Hiramoto

Masayuki Ohayashi

Shigeo Kuroda

Toru Nishikawa

Kazuhiro Akimoto

Yoshiaki Emoto

Hisashi Ishida

Koichi Koyano

Jun Hirokawa

Osamu Yamada

Ryohei Satoh

Kaoru Katayama

Mitsugu Shirai

Takeshi Yamaguchi

Takeshi Miitsu

Kouichi Takahashi

Tsutomu Sakamoto

Kouichi Yamamoto

Katsuro Kawazoe

Takahiko Matsushita

Osamu Maruyama

Maria Katsuki

A sealing structure for multi-chip modules stable in cooling performance and excelling in sealing reliability is to be provided. The under face of a framecompatible with a wiring boardin thermal expansion rate is fixed with solderto the face of the wiring boardfor mounting semiconductor devices; a rubber O-ringis placed between the upper face of the frameand the under face of the circumference of an air-cooled: heat sink; the plastic membermaking possible relative sliding is placed between the upper face of the circumference of the heat sinkand the upper frame; the upper face of a plastic memberis restrained with the inside middle stage of an upper frame; and the lower part of the upper frameand the frameare fastened together with bolts

Sealing structure for multi-chip module

A connector is used for connecting a plurality of first terminals formed on a first electronic part to a plurality of respective second terminals formed on a second electronic part. The connector comprises an intermediate basis material having a spring characteristic, a plurality of first electrically conductive members provided on a first surface of the intermediate basis material, a plurality of second electrically conductive members provided on a second surface of the intermediate basis material, and wiring for connecting each of the first electrically conductive members to a corresponding one of the second electrically conductive members. Such electrically-conductive members may be columnar, tubular, spherical, and the like, and of appropriate width, thickness and material with regard to the characteristic requirements of the intermediate basis material.

Connector and an electronic apparatus having electronic parts connected to each other by the connector

According to the invention, a sealing top plate in a multi-chip module is formed from a ceramic with high thermal conductivity having a thermal expansion coefficient consistent with that of a multi-layer circuit substrate. A cooling flow path cover covering the entirety of cooling flow path grooves is formed as a separate metallic member. The back surface of the sealing top plate, on which are formed the cooling flow path grooves, is bonded directly to the back surface of a semiconductor device using solder. A thermal-conductive jacket with low thermal resistance is provided. A multi-chip module sealing frame is soldered to the edge of the sealing top plate. Furthermore, a sealing material such as an O-ring is simply interposed between the edge of the sealing top plate and the cooling water path cover, and tightening means is used to tighten the metallic cooling flow path cover and the multi-chip module sealing frame to each other.

Device for sealing and cooling multi-chip modules

An input-output circuit cell includes an input-output circuit formed on a semiconductor chip and having a signal terminal and an electric source terminal and a plurality of input-output bumps connected to the signal and electric-source terminals of the input-output circuit through wirings respectively, the plurality of input-output bumps being made to correspond to the input-output circuit and arranged at a center in a plane of projection of the input-output circuit. Accordingly, the input-output circuit is disposed in an arbitrary position on the semiconductor chip.

Input-output circuit cell and semiconductor integrated circuit apparatus

A multi-chip module is provided with a structure for disposing of a large amount of surplus solder at soldered portions. In this multi-chip module, a cooling member (structure) is soldered directly at the back side of heat generating member such as a semiconductor integrated circuit element. In order to dispose of the surplus solder, the present invention has a first metallized part formed at a cooling member which is larger than a second metallized part formed at the back side of semiconductor integrated circuit element which is solder with the first metallized part.

Multi-chip module

An electronic device is solder bonded properly without using fluxes nor precise positioning with respect to a substrate. A bond pad with a size about twice the size of terminal pad of the electronic device is formed in a region on the substrate where the electronic device is to be mounted. After placing the electronic device of the substrate surface, the whole unit is heated in a nitrogen atmosphere to melt a bump formed on the terminal pad of the electronic device. The molten solder wets and spreads over the bond pads formed on the substrate, thereby establishing reflow soldering between the bond pads and the terminal pads. The position of the electronic device with respect to the substrate is spontaneously corrected due to a self-alignment function induced by wetting and spreading of the molten solder over the bond pad of the substrate.

Electronic device bonding method and electronic circuit apparatus

Disclosed are a semiconductor integrated circuit device and methods for production thereof. An embodiment of the invention is a semiconductor chip that comprises fuses constituting part of redundancy circuits formed therein, the fuses being made of the same ingredients CCB bump substrate metal. The fuses are patterned simultaneously during the patterning of the CCB bump substrate metal. This involves forming the fuses using at least part of the ingredients of an electrode conductor pattern in the chip. The cutting regions of the fuses are made of only one of the metal layers constituting the substrate. The principal plane of the semiconductor chip has a fuse protective film formed over at least the cutting regions of the fuses for protection of the latter. In operation, a switch MOSFET under switching control of a redundancy signal is used to select one of two transmission paths, one carrying an address signal or a decode signal, the other carrying a reference voltage. This allows a faulty circuit to be replaced with the corresponding redundancy circuit.

Semiconductor integrated circuit device and methods for production

Disclosed are a semiconductor integrated circuit device and methods for production thereof. An embodiment of the invention is a semiconductor chip that comprises fuses constituting part of redundancy circuits formed therein, the fuses being made of the same ingredients as those of a CCB bump substrate metal. The fuses are patterned simultaneously during the patterning of the CCB bump substrate metal. This involves forming the fuses using at least part of the ingredients of an electrode conductor pattern in the chip. The cutting regions of the fuses are made of only one of the metal layers constituting the substrate. The principal plane of the semiconductor chip has a fuse protective film formed over at least the cutting regions of the fuses for protection of the latter. In operation, a switch MOSFET under switching control of a redundancy signal is used to select one of two transmission paths, one carrying an address signal or a decode signal, the other carrying a reference voltage. This allows a faulty circuit to be replaced with the corresponding redundancy circuit.

A method of manufacturing a semiconductor integrated circuit device wherein a conductor film is formed on a front surface of a substrate by a lift-off technique; comprising forming a first resist film on that area of the substrate surface on which the conductor film is not formed, forming a second resist film on the whole substrate surface including the first resist film and a conductor film forming area of the substrate surface, providing a first opening for forming the conductor film in a conductor film forming area of the second resist film and also providing a second opening for forming a dummy conductor film in that area of the second resist film in which the conductor film is not formed, depositing the conductor film on the whole substrate surface including the substrate surface inside the first opening, the first resist film inside the second opening and the second resist film, and removing the second resist film and the first resist film respectively, so as to leave the conductor film inside the first opening and to remove the conductor film on the second resist film and the dummy conductor film on the first resist film.

Method of manufacturing semiconductor integrated circuit device

Growing community of inventors

Hadano, Japan

Takayuki Uda