Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Takayuki Teraguchi

Yosuke Ogasawara

Katsue Kawakyu

Takahiro Nakagawa

Shigehiro Hosoi

Noriyoshi Odaki

Masahiro Hasegawa

According to one embodiment, a radio frequency switch of a Single-Pole-n-Throw (SPnT) type includes a first RF terminal, a second RF terminal, a single RF common terminal, first MOS transistors, termination resistors, and second MOS transistors. The first MOS transistors are respectively provided between the first RF terminal and the RF common terminal and between the second RF terminal and the RF common terminal. Each of the termination resistors is configured to be connected to the first RF terminal or the second RF terminal in a selected state where a corresponding one of the first MOS transistors is in an OFF state. The second MOS transistors are connected in parallel to the respective termination resistors, and each of the second MOS transistors is configured to be controlled in a same manner as a corresponding one of the first MOS transistors.

Radio frequency switch and semiconductor device

According to one embodiment, a high frequency semiconductor integrated circuit includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, first to fourth switch circuits. In a case where a coupling destination of the first input terminal is switched from the first output terminal to the second output terminal, a third switching operation changing the third switch circuit from an ON state to an OFF state and a fourth switching operation changing the fourth switch circuit from the OFF state to the ON state are finished, after a first switching operation changing the first switch circuit from the ON state to the OFF state and a second switching operation changing the second switch circuit from the OFF state to the ON state are finished.

High frequency semiconductor integrated circuit

According to an embodiment, an SPnT-type high frequency switch includes a plurality of first MOS transistors, second MOS transistors, and a capacitor. The plurality of first MOS transistors are connected in series between one of a plurality of RF terminals and an RF common terminal. The second MOS transistors have ends each connected to adjacent first MOS transistors among the first MOS transistors. The capacitor is connected between ground and another end of a second MOS transistor having one end connected to another end of a first MOS transistor having one end connected to the one of the RF terminals among the first and second MOS transistors.

High frequency switch and semiconductor device

A semiconductor device includes an input terminal, an output terminal, and a plurality of transistors. The transistors are coupled through serial coupling. The transistors include a first transistor and a second transistor. The first transistor has a first end and a second end. The second transistor has a third end, a fourth end, a first gate, and a first body. The third end is coupled to the second end. The semiconductor device further includes a third transistor and a first diode. The third transistor and the first diode are serially coupled between the first body and the first end. The third transistor includes a second gate coupled to the first gate.

Semiconductor device

According to one embodiment, a semiconductor device includes a first transistor and a second transistor. The first transistor includes a first end, a second end, and a first body. The second transistor includes a third end coupled to the second end, a fourth end, and a second body. The semiconductor device includes a first resistor coupled to the first end, a second resistor coupled between the first resistor and the second end, a third resistor coupled to the third end, a fourth resistor coupled between the third resistor and the fourth end, a first diode coupled between the first body and a node coupling the third resistor and the fourth resistor, and a second diode coupled between the second body and a node coupling the first resistor and the second resistor.

A semiconductor device includes a field effect transistor formed on a semiconductor layer. The field effect transistor can be used for passing or blocking a radio frequency signal. A signal interconnection wiring is above the field effect transistor in a first direction. A plurality of conductors, which are in electrically insulated from each other and other elements in the device, is between the field effect transistor and the signal interconnection wiring in the first direction. A length, in a second direction, of each floating conductor is less than a width, in the second direction, of a gate of the field effect transistor. Here, the second direction is parallel to the plane of the semiconductor layer and perpendicular to a gate length direction of the field effect transistor.

A regulator includes a capacitor connected between a ground terminal and an output terminal at which a first voltage is supplied. The first voltage is higher than a power source voltage supplied to the regulator. A feedback circuit in the regulator is configured to output a boost signal corresponding to a comparison between the first voltage and a threshold voltage value. A clock generating circuit includes an oscillator circuit that outputs an oscillation signal and a buffer circuit that outputs a clock signal according to the oscillation signal. The clock signal has an electric current level that is controlled in accordance with the boost signal. A charge pump outputs the first voltage in accordance with the clock signal.

Semiconductor device and method of manufacturing the same

A switching circuit comprises a first transistor and a second transistor formed in an active area of semiconductor substrate. The source and drain regions of the transistors are electrically connected to respective source wires and drain wires through a plurality of intermediate metal layers stacked above the transistor. Electrical connections between different layers are made with a plurality of vias. To improve switching performance, the intermediate wires are disposed such that intermediate wires electrically connected to the transistor source regions are not directly beneath the drain wires. Similarly, intermediate wires electrically connected to drain regions are arranged not to be directly underneath source wires.

Switching circuit

A switching control circuit controls a switching circuit based on decoded signals obtained by decoding several input signals. The switching control circuit is includes a decoder circuit that outputs decoded signals obtained by decoding coded input data signals. The switching control circuit includes a driver circuit that generates control signals for controlling the switching circuit based on the decoded signals. The switching control circuit is provided with a synchronous control circuit that synchronizes the input signals before outputting them for decoding.

Switching control circuit and switching device

According to one embodiment, a semiconductor switch includes a power supply section, a driver, and a switch section. The power supply section is configured to generate a first potential higher than a positive power supply potential, and a negative second potential. The driver is connected to the power supply section and configured to output a control signal. A potential of the control signal is set to the first potential at high level and set to the second potential at low level according to a terminal switching signal. The switch section is configured to receive the control signal and switch a connection between terminals. The driver has a first level shifter, a second level shifter and a first circuit. The first level shifter has a first high-side switch and a first low-side switch. The second level shifter has a second high-side switch and a second low-side switch.

Semiconductor switch

According to one embodiment, a power detector includes a reference voltage generator, a square signal generator, a detection circuit, and an output circuit. The reference voltage generator is configured to receive a bias voltage and generate a reference voltage. The square signal generator is configured to receive a voltage having a high frequency input voltage superimposed on the bias voltage and output a signal including the reference voltage, a voltage of a square of the high frequency input voltage, and a high-frequency signal. The detection circuit has a first lowpass filter, a first operational amplifier configured to amplify error between an output voltage of the first lowpass filter and the reference voltage and output the error as a control voltage, and a feedback transistor configured to feed a feedback current according to the control voltage back to an output terminal of the square signal generator.

Power detector and wireless device

There is provided an amplifier circuit includes: an amplifying transistor; a first transistor having a DC current amplification factor generally equal to the DC current amplification factor of the amplifying transistor and constituting a current mirror circuit in conjunction with the amplifying transistor; and a current source circuit being operable to supply a current to the first transistor and including a second transistor having opposite conductivity type to the conductivity type of the first transistor. The second transistor is operated in a saturation region at a power supply voltage lower than an operating voltage range so that the DC current amplification factor of the amplifying transistor can be detected.

Amplifier circuit

A high frequency switching circuit is disclosed. The high frequency switching circuit is provided with first and second high frequency signal terminals, a control terminal, a field-effect transistor having a drain, a source and a gate. The field-effect transistor is connected between the first and the second high frequency signal terminals so as to switch a high frequency signal. The high frequency switching circuit is further provided with a variable resistance circuit which is connected between the gate of the field-effect transistor and the control terminal.

Growing community of inventors

Kanagawa-ken, Japan

Takayuki Teraguchi