Toshiba Memory Corporation

Kabushiki Kaisha Toshiba

Nitto Chemical Industry Co., Ltd.

Takayuki Takano

Ichiro Watanabe

Yoshiaki Satoh

Susumu Nitta

A memory system includes a memory chip, a queue block and a memory controller. The queue block is configured to store a command to be transmitted to the memory chip. The queue block includes a first queue and a plurality of second queues each corresponding to a plane of the memory chip. The memory controller is configured to determine whether or not a first command enqueued in the first queue is a first read command. The first read command is a command for executing read operation in the planes asynchronously. When the first command is the first read command, the memory controller transfers the first command to one of the second queues corresponding to a plane in which the first command is to be executed. The memory controller selects the first queue or the second queues as a source of a command to be transferred to the memory chip.

Memory system

According to one embodiment, a storage device includes a first nonvolatile memory, a second volatile memory, and a controller. In the second volatile memory, at least one of management information for managing user data written in the first nonvolatile memory and the user data is temporarily written as cache data. The controller is configured to execute processing for writing the cache data written in the second volatile memory to a third memory of the host device, if the storage device is changed from a regular mode to a low power consumption mode in which supplying of power to the second volatile memory is stopped, in response to a request from a host device.

Storage device and data saving method

A logic circuit has a first circuit block, a second circuit block, and a test circuit composed of a first multiplexer and a second multiplexer. In normal operation mode, the first multiplexer connects the output terminal of the first circuit block to the input terminal of the second circuit block on the basis of the first test signal, and the second multiplexer disconnects the input terminal of the second circuit block from the external output terminal on the basis of the second test signal; in a first test mode for outputting a signal outputted by the first circuit block through the external output terminal, the first multiplexer connects the output terminal of the first circuit block to the input terminal of the second circuit block on the basis of the first test signal, and the second multiplexer connects the input terminal of the second circuit block to the external output terminal on the basis of the second test signal; and in a second test mode for inputting a signal inputted to the second circuit block through the external input terminal, the first multiplexer connects the external input terminal to the input terminal of the second circuit block on the basis of the first test signal, and the second multiplexer disconnects the input terminal of the second circuit block from the external output terminal on the basis of the second test signal. Therefore, the test circuit can inspect whether there exists any erroneous connection relationship in the normal operation mode of the logic circuit, after the test circuit has been connected.

Method of checking connections between each of a plurality of circuit

The present invention relates to a process for producing acrylamide or methacrylamide utilizing microorganisms having a nitrilase activity. This process involves (1) utilizing highly active novel bacteria belonging to the genus Corynebacterium or the genus Nocardia, (2) conducting the reaction utilizing microorganisms having a nitrilase activity at temperatures as low as the freezing point of the medium to 15.degree. C. so as to conduct the reaction for a long period of time while maintaining a high concentration of acrylamide or methacrylamide, and (3) conducting the reaction according to a newly devised continuous column process to obtain a highly concentrated acrylamide or methacrylamide aqueous solution with economic advantages.

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Yokohama, Japan

Takayuki Takano