Hitachi, Ltd.

Hitachi Vlsi Engineering Corp.

Other

Dai Nippon Printing Co., Ltd.

Hitachi Ulsi Engineering Corp.

Dia Nippon Printing Co., Ltd.

Takayuki Okinaga

Kanji Otsuka

Takashi Emata

Osamu Horiuchi

Hiromichi Suzuki

Yuuji Shirai

Hiroshi Tachi

Gen Murakami

Yasuyuki Yamasaki

Michiaki Furukawa

Hiroshi Ozaki

Hajime Hasebe

Yuji Shirai

Kazunori Katoh

Shouji Matsugami

Kunihiko Nishi

Masachika Masuda

Takeo Yamada

Mitsuo Usami

Tamaki Wada

Toshio Sugano

Yuji Yamaguchi

Tomoaki Kudaishi

Shigeo Kuroda

Hiroshi Akasaki

Toshihiro Matsunaga

Masao Kato

Kunizo Sahara

Seiji Miyamoto

Takashi Kumagai

Toshihiro Tsuboi

Shuichiro Azuma

Takashi Miwa

Makoto Omata

Kazutoshi Kubo

Masayuki Kawashima

Hiroshi Koguma

To realize low-profile electronic apparatus (a memory module and a memory card) of a large storage size by mounting tape carrier packages (TCPs) with a memory chip encapsulated onto a wiring board in high density. To be more specific, a TCP is composed of an insulating tape, leads formed on one side thereof, a potting resin with a semiconductor chip encapsulated, and a pair of support leads arranged on two opposite short sides. The pair of support leads function to hold the TCP at a constant tilt angle relative to the mounting surface of the wiring board. By varying the length vertical to the mounting surface, the TCP can be mounted to a desired tilt angle.

Semiconductor device

A molded semiconductor device has a plurality of slender leads formed with a sealing strip connecting them together to prevent the molding material from leaking out between the leads. Specifically, the sealing strip comprising an adhesive and an electrically insulating material is applied to the leads substantially perpendicular to the lengthwise direction of the leads. The strip is place such that an inner edge thereof substantially lies on a boundary line or inside where the molding terminates. The strip is then thrust into spaces formed between the leads. Thereafter the semiconductor chip is connected to the leads, the semiconductor chip and the leads are placed in a molding unit, the strip serving to block the molding material leaking outside the molding unit.

Method of fabricating a molded semiconductor device having blocking

A leadframe according to this invention is formed by bonding a single leadframe with a substrate using adhesive film or double-sided adhesive resin film, which is divided and attached to two or more predetermined points between them. This reduces the quantity of gas or contaminants generated from adhesives. Also, this results in the reduction of the stress generated during heat treatment of the leadframe and also in the elimination of warping of the lead frame due to thermal stress. Cracking does not occur on the resin because resin is removed easily and assuredly, and no air is left behind. This contributes to high reliability and increased productivity. The lead frame is further formed by bonding a plurality of metal substrates of different materials to single leadframe. This through more stable thermal behavior high reliability.

Semiconductor device having a leadframe and metal substrate

A semiconductor circuit device includes a multi-layered substrate comprising a plurality of signal lines sandwiched between a power source line and a ground line, with insulation layers formed therebetween to reduce fluctuation of a ground line potential at the time of simultaneous switching of the signal lines and to increase the operational speed. The signal lines provides bidirectional current paths and is disposed between the current source line and the ground line. The multi-layered substrate is formed around a semiconductor pellet. Electrode pads are formed on the insulation layer over the ground line on the same level as the signal lines and generally on the same level as the main surface of the semiconductor pellet where electrodes pads are formed. Bonding wires are used to electrically connect the electrode pads on the pellet and the electrodes formed on the insulation layer. Additional bonding wires are used to electrically connect the electrode pads formed on the insulation layer and electrode pads formed on the power source line which is at a higher level and further away from the electrode pads formed on the insulation layer. Some of the electrode pads formed on the insulation layer is directly connected to the ground line using a side plate extension.

Semiconductor integrated circuit device

A semiconductor device is provided having a semiconductor pellet that is arranged on a substantially central part of a film base in which a metal plate is overlaid with an insulating member, while inner leads are arranged on a peripheral part of the film base in a state in which they are electrically isolated from the metal plate of the film base. External terminals for a power source among external terminals of the semiconductor pellet and middle parts of the metal plate of the film base, as well as inner leads for the power source among the inner leads and peripheral parts of the metal plate are electrically connected by pieces of bonding wire, respectively.

Semiconductor device and method of producing the same

A multi-layer leadframe according to this invention is formed by laminating on a leadframe body an insulating layer and an electrically conductive layer in this order. The electrically conductive plate includes a planar portion and a given number of terminal portions extending therefrom, said planar portion extending across said insulating layer laminated on said leadframe body. The planar portion is made thinner than the terminal portions. A thin portion of this planar portion is formed by an etching technique, and at least a part of the terminal portions of the electrically conductive plate is fixedly connected with an inner lead of the leadframe body.

Multi-layer leadframes, electrically conductive plates used therefor and

According to the present invention, as improvement in the adhesion of inner leads with a packaging resin in a resin-sealed semiconductor device is attained by spreading leads on or near the circuit-forming face of a pellet, or on or near the main non-circuit-forming face of the pellet to extend the lengths of the inner leads on or under the pellet.

Semiconductor device and process for producing the same, and lead frame

Semiconductor device having inner leads extending over a surface of a

A semiconductor device of pin-grid array (PGA) type, which is adapted for surface-mounting on a printed circuit board, has lead pins arranged in a grid and standing perpendicularly on a base of the semiconductor device. In addition, a few pins are provided which are longer than said lead pins in said grid. When the device is placed on the printed circuit board for mounting, the longer pins are inserted into through-holes which are respectively formed in the printed circuit board to correspond to the position of the longer pins of the device. Thus, the tip of the lead pins are accurately positioned on the top of lands on the printed circuit board, respectively, and the lead pins do not get out of position during the mounting operation.

Pin-grid array semiconductor device

Attempts have been made to increase the number of pins of packages accompanying the trend toward fabricating integrated circuits highly densely and in smaller sizes. The present invention provides technology for improving reliability in fabricating packages of the surface-mounted type that have increased number of pins. That is, when the packages are mounted on the wiring substrate, the lead pins that receive load from the axial direction exhibit bending strength which is smaller than the junction strength of solder at the junction portions. To achieve this object, the lead pins are made of a material having large resiliency such as a fiber-reinforced material, a transformation pseudo elastic material, an ultra-high tension material, or a heat-resistant ultra-high tension material.

Semiconductor device having leads for mounting to a surface of a printed

A semiconductor device comprising the fact that a semiconductor pellet is arranged on a substantially central part of a film base in which a metal plate is overlaid with an insulating member, while inner leads are arranged on a peripheral part of the film base in a state in which they are electrically isolated from the metal plate of the film base, and that external terminals for a power source among external terminals of the semiconductor pellet and middle parts of the metal plate of the film base, and inner leads for the power source among the inner leads and peripheral parts of the metal plate are electrically connected by pieces of bonding wire, respectively.

A semiconductor chip package technology which uses thin film wiring from the chip to the package terminals for increased line density and decreased parasitic capacitance and uses a thin film adhesion layer for improved heat conductivity between the package substrate and its sealing cap. The package uses a thin conductor film deposited along the element mounting surface of a sintered substrate. An adhesion layer, to provide a high quality bond between the sealing cap and substrate, is then deposited on the substrate peripheral area by successively laminating metal and metallized layers, or by depositing a single layer of low metal glass. The adhesion layer is thinner and of larger area than thick film technology, for improved heat conduction.

Semi-conductor device

Growing community of inventors

Akishima, Japan

Takayuki Okinaga