Mitsubishi Electric Corporation

Sumitomo Metal Mining Company, Ltd.

Kirin Beer Kabushiki Kaisha

Takayuki Nakai

Yoshitomo Ozaki

Osamu Nakai

Junichi Takahashi

Hiroshi Kobayashi

Tomokazu Ogomi

Satoshi Asano

Tatsuya Higaki

Satoshi Matsubara

Koji Tsutsumi

Hideki Ohara

Shin-ichi Heguri

Akio Kamimurai

Keisuke Shibayama

Eiji Taniguchi

Ryosuke Takeuchi

Toshirou Tan

Yoji Kyoda

Hitoshi Ishida

Shinichi Heguri

Norihisa Toki

Noriyuki Nagase

Tadahisa Kono

An active load stage converts a first input current and a second input current into a first voltage and a second voltage. A driver amplifier operates upon receiving the first voltage and the second voltage from the active load stage, and outputs a current to an output terminal. The driver amplifier has a first transistor and a second transistor connected in series between a first reference potential terminal and a second reference potential terminal. The first transistor receives the first voltage at a gate and passes a first current, and the second transistor receives the second voltage at a gate and passes a second current. A minimum selector provides feedback to the first voltage and the second voltage such that an absolute value of each of the first current and the second current becomes more than or equal to a quiescent current of the driver amplifier.

Class AB amplifier and operational amplifier

A second main electrode of a first transistor is connected to a first main electrode of a sixth transistor, a second main electrode of the sixth transistor is connected to a first main electrode of a fifth transistor at a first node, a second main electrode of the fifth transistor is connected to a second main electrode of a second transistor, a control electrode of the fifth transistor is connected to the second main electrode of the fifth transistor, a second main electrode of a third transistor is connected to a first main electrode of a fourth transistor at a second node, and a control electrode of the fourth transistor is connected to the control electrode of the fifth transistor. A gain control amplifier controls a voltage supplied to a control electrode of the sixth transistor such that the first node and the second node are equal in voltage.

An interface circuit serves to receive an input signal VIN having a high level defined as a high potential VIH and a low level defined as a low potential VIL, and output an output signal VOUT having a high level defined as a high potential VOH and a low level defined as a low potential VOL. The interface circuit includes a polarity controller configured to control the output signal VOUT to be in phase in level with the input signal VIN or to be reversed in polarity with respect to the input signal VIN, depending on whether the high potential VIH or the low potential VIL is a GND potential.

Interface circuit

In a sensor reader, an IC chip has a function for amplifying and outputting a sensor signal from each sensor element included in a sensor array, and includes a plurality of channel amplifiers connected each of the sensor elements. When an output switch is closed and the IC chip is in the outputting state, channel switches operate sequentially, and sensor amplification signals are output sequentially from the channel amplifiers. When the output switch is open and the IC chip is in the non-outputting state, a bias current of an operational amplifier of the channel amplifier is decreased, the IC chip is set to a low power consumption state, and gain of the operational amplifier is decreased.

Semiconductor integrated circuit, sensor reader, and sensor readout method

In an output amplifier stage of an operational amplifier circuit, the first p-well of the first nMOSFET and the second p-well of the second nMOSFET are connected to the fourth node. Further, the first n-well of the first pMOSFET and the second n-well of the second pMOSFET are connected to the fifth node. At least one of the fourth node and the fifth node is connected to an output terminal VOUT.

Operational amplifier circuit

A first flip-flop outputs a first output signal as a first switch signal that controls a first switch. A second flip-flop outputs a second output signal based on a clock signal and the first output signal. A first inverting circuit generates a first inverted signal obtained by inverting the first output signal. A second AND circuit outputs a signal that is an AND of the first inverted signal and the second output signal, as a second switch signal that controls a second switch.

Switch control circuit, semiconductor apparatus, and magnetic ink reading apparatus

Bias current is supplied to a first differential pair and a second differential pair from a first transistor being a single current source. Bias current is supplied to a third differential pair and a fourth differential pair from a second transistor being a single current source. An input voltage is at a power supply potential, and an input voltage is at a ground potential. When the second differential pair and the third differential pair are turned OFF, the bias current supplied from the first transistor flows to an output stage via the first differential pair, and the bias current supplied from the second transistor flows to the output stage via the fourth differential pair. Therefore, when the second differential pair and the third differential pair are turned OFF, a circuit current is kept constant, and a fluctuation in a frequency characteristic can be restrained.

Operational amplifier circuit and bias current supply method

In a PLL circuit, first an ILFD is connected to an output voltage Vtune from an LPF, thereby causing the ILFD to operate as an oscillator. The ILFD, a DIV, PFD, CP, and LPF form a PLL and thereby locking operations are initiated. When a predetermined time elapses, an output frequency from the ILFD converges into a certain value and the PLL is subjected to a locked state. After the locked state is reached, a sample hold circuit SH holds the output voltage Vtune from the loop filter as of that time and frequency adjustment of the ILFD is completed. Similar frequency adjustment is sequentially performed on other ILFDs.

Phase locked loop circuit and method of frequency adjustment of injection locked frequency divider

Provided are a treatment method for a barren solution, and a treatment device for a barren solution, with which hydrogen sulfide can be efficiently removed from the barren solution. In an aeration tank provided with a vertical-type cylindrical reaction vessel, stirring blades arranged in the reaction vessel, and an annular aeration tube having a large number of air outlets, which is arranged to a bottom part of the reaction vessel, aeration is performed by blowing gas for aeration into the reaction vessel from a large number of air outlets of the aeration tube while stirring a liquid by rotation of the stirring blades.

Processing device and processing method for hydrogen-sulphide-containing barren solution

To provide a method for recovering lithium, that is capable of efficiently recovering lithium without containing impurities, such as phosphorus and fluorine, from a lithium-containing solution containing lithium hexafluorophosphate and separated from a lithium ion battery. In the present invention, alkali hydroxide is added to the lithium-containing solution and the solution is made to have pH 9 or more, a precipitate of a phosphate and a fluoride salt is formed, the formed precipitate is separated and removed, and then lithium is recovered from filtrate.

Method for recovering lithium

An active balun circuit includes a CG transistor having a source terminal thereof connected to an input terminal and a gate terminal thereof grounded, a CS transistor having a gate terminal thereof connected to the input terminal and a source terminal thereof grounded, an asymmetrical transformer, a first output terminal, and a second output terminal. The asymmetrical transformer includes a primary coil and a secondary coil. The primary coil includes a first inductor connected to the CG transistor and a second inductor connected to the CS transistor. The secondary coil includes a third inductor associated with the first inductor and a fourth inductor associated with the second inductor. The first output terminal outputs a first signal generated at the third inductor, and the second output terminal outputs a second signal generated at the fourth inductor.

Active balun circuit and transformer

Disclosed herein is a method for easily and efficiently removing manganese from an aqueous acidic solution of sulfuric acid containing cobalt and manganese at low cast to obtain a high-purity cobalt sulfate aqueous solution usable as a raw material for lithium ion secondary batteries. The high-purity cobalt sulfate aqueous solution is obtained by mixing an aqueous acidic solution of sulfuric acid containing cobalt and manganese (aqueous phase) with an acidic organic extractant (organic phase) while adjusting the pH of the aqueous acidic solution of sulfuric acid to a value in a range between 2 and 4 with a pH adjuster such as sodium hydroxide to extract manganese into the organic phase. The acidic organic extractant to be used is preferably diluted so that the concentration of di-2-ethylhexyl phosphate is 10 to 30 vol %.

Method for producing high-purity cobalt sulfate aqueous solution

Provided is a method for producing cobalt sulfate, wherein, on the occasion of separating an acidic solution containing calcium, magnesium and sodium as impurities from a cobalt chloride solution by solvent extraction, when a diluent is added to the extractant to be used to dilute the extractant by 10% to 30% by volume; in Step 1, the operational pH is maintained in the range of 4.0 to 5.0 and the liquid volume ratio of organic phase/liquid phase is maintained in the range of 5.0 to 7.0; in Step 2, the operational pH is maintained in the range of 4.0 to 4.5 and the liquid volume ratio of organic phase/liquid phase is maintained in the range of 5.0 to 10.0; and in Step 3, the pH is maintained in the range of 0.5 to 1.0.

Method for producing cobalt sulfate

Provided is a production method for obtaining high purity nickel sulfate having low levels of impurities, particularly low levels of magnesium and chloride, by adjusting the concentration of an extractant and the pH concentration at the time of treatment in a process of obtaining a nickel sulfate solution having a high nickel concentration by solvent extraction using an acidic organic extractant.

Method for producing high-purity nickel surface

Provided is a method for producing ferronickel from a nickel sulfide or a mixed sulfide containing nickel and cobalt, obtained by hydrometallurgy of nickel oxide ore or obtained from scraps or products in process. The method for producing a ferronickel raw material is to form the ferronickel raw material from a nickel sulfide or a mixed sulfide containing nickel sulfide and cobalt sulfide, wherein treatments are performed through the following steps: (1) redissolution step, (2) deferrization step, (3) solvent extraction step, (4) hydroxylation step, (5) roasting step, and (6) washing and calcining step.

Growing community of inventors

Tokyo, Japan

Takayuki Nakai