Shinko Electric Industries Co., Ltd.

Takayuki Nagasaki

Tamotsu Kitamura

Hiroyuki Sakai

Takahide Ichimura

A wiring editing method for a semiconductor package of this invention includes the steps of assuming virtual circular arcs R to R in consideration of a clearance around a predetermined via in a designated area on a virtual plane, drawing a regular polygon circumscribing each of the virtual circular arcs R to R drawing a tangent from a via crossed by one of the virtual circular arcs R to R to the crossing virtual circular arc and connecting to the regular polygon circumscribing the crossing virtual circular arc to thereby form a wiring pattern and moving or omitting redundant line segments forming the regular polygon in the wiring pattern to change a wiring route when an offset occurs in the wiring pattern passing between the vias inside the designated area.

Wiring editing method, for semiconductor package, capable of easily editing offset of wiring pattern

An automatic wiring method for a semiconductor package includes: a provisional wiring step for sequentially specifying a plurality of lines of the terminals from the innermost periphery to the outermost periphery of bonding pads, connecting the bonding pads to predetermined vias present on the specified line of the terminal with line segments, and provisionally determining a wiring route for each line of the terminal such that the line segment passes through between the vias in each line of the terminal at equal intervals; and a wiring formation step for forming the wiring based on a design rule such that the wiring pattern passes through between the lines of the terminals with uniform intervals between wires based on the provisionally wired wiring routes.

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Nagano, Japan

Takayuki Nagasaki