Hitachi, Ltd.

Renesas Technology Corp.

Takayoshi Watanabe

Susumu Kasukabe

Hidetaka Shigi

Terutaka Mori

Akihiko Ariga

Makoto Kitano

Ryuji Kohno

Yasuhiro Motoyama

Kunio Matsumoto

Tetsuo Kumazawa

Naoto Ban

Yuji Wada

Ryuji Kono

Shuji Shibuya

Takashi Inoue

Hitoshi Oka

Koji Suzuki

Tsuyoshi Fujita

Hiroshi Yamagishi

Shigeru Saito

Shoji Oikawa

To achieve high speed exchange of electrical signals between a connection device and a tester, a support member is provided for supporting the connection device, a plurality of pointed contact terminals are arrayed in an area on the probing side, a multiplayer film is provided having a plurality of lead out wires electrically connected to the contact terminals and a ground layer enclosing an insulation layer, and a frame is clamped on the rear side of the multiplayer film. A clamping member is provided on the frame to make the multiplayer film project out to eliminate slack in the multiplayer film. A contact pressure means is provided for making the tips of the contact terminals contact each of the electrodes with predetermined contact pressure from the support member to the clamping member. A compliance mechanism is provided so that the contact terminal group of the tip surface is arrayed in parallel with the electrode group terminal surface, so that the tips of the contact terminals contact the surface of the electrodes with an equal pressure.

Connection device and test system

A semiconductor device capable of facilitating high density mounting at low cost without causing any defective conduction at the time of connection to a substrate, a mounting structure thereof and a method of fabrication thereof, characterized in that pyramidal bump electrodes are bonded onto pad electrodes arranged on a semiconductor chip to form the semiconductor device.

Method for producing a semiconductor device with pyramidal bump electrodes bonded onto pad electrodes arranged on a semiconductor chip

Dispersion of load may be kept within an allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane to a wafer by applying a pressure load to a plurality of places of a plane of pressure members on the side opposite from the wafer in a probe test step/burn-in test step which is one of semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit in the same time.

Semiconductor device and manufacturing method thereof including a probe test step and a burn-in test step

A connection device and test system is capable of stable, low load damage-free probing of devices under test, which have many pins with a narrow pitch. Furthermore in order to achieve high speed exchange of electrical signals or so-called high frequency electrical signals, a support member is provided for supporting the connection device, a plurality of pointed contact terminals are arrayed in an area on the probing side, a multilayer film is provided having a plurality of lead out wires electrically connected to the contact terminals and a ground layer enclosing an insulation layer, and a frame is clamped on the rear side of the multilayer film. A clamping member is provided on the frame to make the multilayer film project out to eliminate slack in the multilayer film, a contact pressure means is provided for making the tips of the contact terminals contact each of the electrodes with predetermined contact pressure from the support member to the clamping member, and a compliance mechanism is provided so that the contact terminal group of the tip surface is arrayed in parallel with the electrode group terminal surface, so that the tips of the contact terminals contact the surface of the electrodes with an equal pressure.

Connector and probing system

Dispersion of a load may be kept within a predetermined allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane against a wafer by applying a pressure load to a plurality of places on a plane of the pressure members on the side opposite the wafer in a probe test step, burn-in test step which represent typical semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit at the same time.

A resistor material having at least chromium, silicon and oxygen, Cr.SiO.sub.2, contained in electronic integrated circuits, particularly in the case of an aluminum layer being on the material, is etched with a liquid etchant composition containing 1.92 to 2.64 mol/l of hydrochloric acid, 0.26 to 0.77 mol/l of phosphoric acid, 5 to 10 mol/l hydrofluoric acid and 3.2 to 5.4 mol/l of ammonium fluoride.

Liquid etchant composition for thin film resistor element

A multilayer ceramic circuit board and method of forming such circuit board are disclosed. The wiring pattern for the multilayer ceramic circuit board includes multiple-layer portions, the multiple-layer portions including first and second electrically conductive layers, respectively a tungsten layer and a copper thick film, for example, with a diffusion layer therebetween for improving adhesivity of the first and second electrically conductive layers to each other. Such multiple-layer portions are provided by providing first and second electrically conductive layers, and an intermediate layer between the first and second electrically conductive layers, and diffusing at least one component from the intermediate layer into both the first and second electrically conductive layers. Thus, a multilayer ceramic circuit board with, e.g., a firmly coupled tungsten layer and copper thick film can be provided.

Multilayer ceramic circuit board

Growing community of inventors

Fujisawa, Japan

Takayoshi Watanabe