Fujitsu Corporation

Fujitsu Semiconductor Limited

Takayoshi Kyono

Jin Takahashi

Shinya Kato

Kazuya Kitasako

Taku Aoki

Ryuichi Nisiyama

A transmission apparatus includes: a multiplier configured to multiply a signal provided on a complex plane by a multiplication coefficient corresponding to a number of transmission sub-carriers; and an inverse fast Fourier transformer configured to perform an inverse fast Fourier transform on the multiplied signal.

Circuit transmission apparatus and transmission method

A data transmitter and a data receiver generate respective synchronous signals from a common reference signal. The data receiver adjusts a phase of a first clock signal using each one of one-bit data signals each consisting of a single bit of received parallel data, so that a setup time and a hold time are ensured for the each one-bit data signal, and loads each one-bit data signal into a data buffer in accordance with the adjusted clock signal. Then, the data receiver reads the data held in the data buffer, in accordance with a second clock signal and in synchronization with the receiver synchronous signal. A memory position where the data signal is to be loaded is initialized when a training pattern transmitted in synchronization with the transmitter synchronous signal is detected.

Device and method for synchronous data transmission using reference signal

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Yokohama, Japan

Takayoshi Kyono