Japan Display Inc.

Takaya Tamaru

Hajime Watakabe

Masashi Tsubuku

Toshinari Sasaki

Akihiro Hanada

Kentaro Miura

According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.

Method of manufacturing semiconductor device

A display device includes a plurality of pixel electrodes each connected to a semiconductor device, a plurality of common electrodes each disposed opposite to a part of the plurality of pixel electrodes, and a plurality of common wirings each connected to the plurality of common electrodes. The semiconductor device includes an oxide semiconductor layer having a polycrystalline structure, and at least a part of each common wiring is composed of the oxide semiconductor layer. Each common electrode may be located across a plurality of pixel electrodes.

Growing community of inventors

Tokyo, Japan

Takaya Tamaru