Hitachi, Ltd.

Kokusai Electric Co., Ltd.

Kokusai Elect. Co. Ltd.

Takaya Suzuki

Kenji Miyata

Akio Mimura

Nobutake Konishi

Yutaka Kobayashi

Takashi Aoyama

Takuzo Ogawa

Mitsuru Ura

Yoshikazu Hosokawa

Yosuke Inoue

Tasao Soga

Masahiro Okamura

Yohsuke Inoue

Kikuo Ono

Genshiro Kawachi

Akihiro Miyauchi

Noboru Akiyama

Hideaki Kawakami

Tsutomu Yatsuo

Fumiyuki Kobayashi

Yutaka Misawa

Akira Fukami

Saburo Oikawa

Toshiyuki Ohno

Jun-ichi Ohwada

Yuzo Kozono

Shinya Iida

Tadao Kushima

Daisuke Kawase

Hiroo Tochikubo

Masahiro Gooda

Masato Fujita

Shinji Okuhara

Seturoo Yagyuu

Seturo Yagiyu

Yoshiaki Okajima

Eimi Adachi

Seturo Yagyu

Masayoshi Nomura

A substrate processing apparatus comprises a substrate processing chamber, a transfer chamber, a substrate mounting body having a through hole formed in a vertical direction and being provided in the substrate processing chamber, a substrate lifting member capable of vertically moving in the through hole, a first arm, capable of extending from the transfer chamber into the substrate processing chamber, for transferring the substrate in a horizontal direction, a second arm capable of extending from the transfer chamber into the substrate processing chamber, capable of moving in a vertical direction and separating the substrate upward from the substrate mounting body by moving the substrate lifting member upward, and a driving mechanism provided in the transfer chamber for extending the first and second arms from the transfer chamber into the substrate processing chamber and for moving the first arm in the horizontal direction and moving the second arm in the vertical direction.

Substrate processing apparatus

To provide a field-effect transistor having a large power conversion capacity and its fabrication method by decreasing the leakage current between the source and the drain of a semiconductor device made of hexagonal-system silicon carbide when the gate voltage of the semiconductor device is turned off and also decreasing the electrical resistance of the semiconductor device when the gate voltage of the semiconductor device is turned on. The main current path of the field-effect transistor is formed so that the current flowing between the source and the drain of, for example, a field-effect transistor flows in the direction parallel with the {0001} plane and a channel forming plane is parallel with the {1120} plane. �Selected Drawing!FIG. 1

Semiconductor device for improved power conversion having a

This invention relates to a thin film semiconductor device and a method for fabricating it, and more particularly a thin film semiconductor device suitably applicable to a display device in an active matrix system and a method for fabricating it. In this invention, the structure of a thin film semiconductor device for improving the characteristic thereof and particularly the structure relative to the dominant orientation of a poly-Si film as an active layer of a thin film transistor (TFT) is disclosed. A method for fabricating a thin film semiconductor device which is capable of forming a poly-Si film at a relatively low process temperature is disclosed. Further, a display device in an active matrix system which provided high performance and high image quality is disclosed. The poly-Si film having a dominant orientation of (111) is formed by forming a poly-Si film on the semiconductor substrate at a temperature up to 570.degree. C. and annealing the substrate at a temperature up to 640.degree. C.

Thin film semiconductor device and method for fabricating the same

A semiconductor device has an active layer in which a semiconductor element is formed by employing a silicon single crystal as a substrate. The present invention causes a tensile strain to remain in the active layer, thereby to improve the carrier mobility.

Semiconductor devices and method for making the same

A thin film transistor formed on an insulating sulstrate is disclosed in which metal silicide layers are formed in a thin film made of a monocrystalline, polycrystalline, or amorphous semiconductor material, to be used as source and drain regions, and further a gate electrode includes a metal silicide layer.

Thin film transistor formed on insulating substrate

A thin film transistor and a method of fabricating the transistor are disclosed. The gate electrode of this thin film transistor is made small in thickness so that active hydrogen for hydrogenating passivation can penetrate in a surface layer of channel region having substantially uniform thickness, through the gate electrode. Thus, hydrogenation can be effectively carried out for the thin film transistor, independently of the length of a channel formed in the transistor.

Thin film semiconductor device and method of fabricating the same

Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel TFT, a pair of contacts formed on the surface of the other island and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.

Thin film semiconductor device and method of manufacturing the same

This invention relates to the structure of a field effect transistor, which is suitable for liquid crystal display of an active matrix scheme and there is disclosed a new structure for the field effect transistor, in which at least one of the source region and the drain region is of multi-layered structure, in which high impurity concentration portions and low impurity concentration portions are alternately superposed on each other.

Field effect transistor

The vapor phase growth on semiconductor wafers is carried out by an apparatus in which a multiplicity of semiconductor wafers are held by a holder so that the semiconductor wafers lie one over another in a vertical direction, and are rotated together with the holder, the holder is placed in a heater disposed in a reaction vessel, a raw material gas supply nozzle and a raw material gas exhaust nozzle are provided within the heater so that the semiconductor wafers are interposed between the gas supply nozzle and the gas discharge nozzle, and the gas supply nozzle and the gas discharge nozzle have gas supply holes and gas discharge holes, respectively, so that a raw material gas can flow on each semiconductor wafer in horizontal directions. When the temperature of the heater is raised by a heating source to heat the semiconductor wafers, the raw material gas is supplied from the gas supply holes to each semiconductor wafer, and thus a uniform layer is grown on each semiconductor wafer from the raw material gas.

Vapor phase growth on semiconductor wafers

This invention relates to improvements in the SOS technology including the so-called laser annealing processing. According to this invention, a semiconductor layer of an SOS structure consists of the three layers of an interface layer made up of twins, a seed crystalline layer and a re-grown layer far thicker than the preceding two layers when viewed from the side of an insulating substrate. The re-grown layer is formed in such a way that a semiconductor layer deposited on the insulating substrate is irradiated with an electromagnetic wave, for example, pulsed ruby laser beam, which is absorbed substantially uniformly by a portion except the interface layer and the seed crystalline layer. According to this invention, the quality of the re-grown layer is improved, and the mobility of carriers is enhanced. As a result, the operating speed of a semiconductor device employing the SOS structure is raised, and the leakage current is reduced.

Method of making devices in silicon, on insulator regrown by laser beam

Disclosed is a method of forming a large number of monocrystalline silicon regions, of uniform orientation, on the surface of an insulator material. Initially, a large number of island regions of amorphous or polycrystalline silicon, thermally connected to one another in a predetermined direction by connecting regions, are provided. Then such island regions are sequentially melted and regrown in such predetermined direction so as to form the monocrystalline semiconductor regions, with such regions having a uniform orientation. Thereafter, such connecting regions can be removed in order to isolate the island regions. The connecting regions can be formed with gaps, whereby such connecting regions need not be removed. The connecting regions can be formed of materials having a higher heat conductivity than that of the material of the island regions, and/or the connecting regions can have a smaller cross-sectional area at right angles to the predetermined direction than that of the island regions. Such island regions can be utilized for forming semiconductor elements, such as MOS FETs, therein.

Method of forming a large number of monocrystalline semiconductor

A method of manufacturing a solar battery by serially connecting a plurality of solar battery elements arranged spaced from each other. A pair of flexible films are used to sandwich the arrangement of the solar battery elements, and each of the flexible films has a plurality of conductive members formed thereon at positions respectively corresponding to the solar battery elements. However, each conductive member has one end portion extended beyond the surface of the corresponding solar battery element in the direction of the alignment of the solar battery elements. Thus, when the pair of flexible films are disposed to sandwich the solar battery elements, the extended end portion of the conductive member on the side of the light receiving surface of one solar battery element is positioned in the space between adjacent solar battery elements opposite the end portion of the conductive member on the side of the back surface of the next solar battery element. By welding both end portions of the conductive members by, for example, a laser beam, the adjacent solar battery elements are successively connected in series.

Method of manufacturing solar battery

This invention provides a thermal fatigue resistant, low-melting point solder alloy consisting of 13 to 20% by weight Bi, 42 to 50% by weight, Pb, the balance being Sn. This solder alloy is suited for lap joints of electronic parts into or onto a printed substrate or a hybrid substrate.

Thermal fatigue resistant low-melting point solder alloys

A method of forming by CVD technique a layer of material with good uniformity and reproducibility on the surfaces of a plurality of substrates supported within the reaction chamber. The feature of the invention is that a gaseous mixture containing a reaction gas is supplied into the reaction chamber from the inlet of the reaction chamber and the auxiliary gas nozzle provided between the inlet and the exhaust in a predetermined control manner. Moreover, part of the gaseous mixture within the reaction chamber is sampled from the gas flow for the measurement of the concentration of the reaction gas, and from the measured results is determined the rate of gas supply from the auxiliary gas nozzle.

Method for chemical vapor deposition

Disclosed is a temperature-compensated voltage reference diode comprising a breakdown PN junction for establishing the zener breakdown voltage, a PN junction for temperature compensation having a temperature coefficient opposite to that of the breakdown PN junction, the breakdown PN junction and the temperature-compensating PN junction being integrally formed in a semiconductor substrate in a laminated fashion with these PN junctions connected in inverse series with each other, and a semiconductor region interposed between the breakdown PN junction and the temperature compensating PN junction for substantially preventing a transistor action from taking place between the respective PN junctions, wherein the semiconductor region is formed of at least one of a polycrystalline semiconductor layer and a single crystal semiconductor layer having an impurity concentration of higher than about 5.times.10.sup.18 atoms/cm.sup.3.

Growing community of inventors

Katsuta, Japan

Takaya Suzuki