Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Renesas Electronics Corporation

Renesas Technology Corp.

Takaya Maruyama

Koji Tsutsumi

Hisayasu Satoh

Eiji Taniguchi

Hisayasu Sato

Takanobu Fujiwara

Takahiro Miki

Atsushi Kato

Yoshinobu Sasaki

Kazuaki Hori

Sho Ikeda

Takahide Ishikawa

Masakazu Mizokami

Noriyuki Tanino

Tomohiro Sano

Yasuharu Nakajima

A filter circuit includes: a filter unit which is connected to a signal line and which has transistors and capacitors which constitute paths for N phases, and in which the transistors to which clock signals of N phases are applied electrically connect the capacitors to the signal line; and a dummy unit which has transistors and impedance parts which constitute dummy paths corresponding, respectively, to the paths for the N phases, and in which the transistors to which inverted signals of N phases are applied electrically connect the impedance parts to the signal line.

Filter circuit

A first transistor, a second transistor, a third transistor, and a fourth transistor, their source terminals being grounded, are provided. Further, a first feedback circuit connected between a gate terminal and a drain terminal in the first transistor, and having first impedance, a second feedback circuit connected between a gate terminal and a drain terminal in the second transistor, and having the first impedance, a current source for outputting a current, a first load circuit connected between the drain terminal of the first transistor and a first output terminal of the current source, and having second impedance, and a second load circuit connected between the drain terminal of the second transistor and a second output terminal of the current source, and having the second impedance are provided.

Current amplifier

There are provided: a table memory to store a relation between a control code and gains of variable gain amplifiers; a gain controller to apply the gains to the variable gain amplifiers; an amplitude phase detector to detect amplitude and a phase from an output signal of the vector sum phase shifter; an amplitude phase recorder to record, when the gains are applied by the gain controller, a combination of a control code corresponding to said gains and the amplitude and the phase detected by the detector; and a table calibrator to find a phase shift characteristic of a vector summed part from records of the amplitude phase recorder and calibrate the relation between a control code and gains recorded in the table memory by using the phase shift characteristic.

Phase shift precision calibration circuitry, vector sum phase shifter, and wireless communication device

Provided is a polyphase filter, which is capable of achieving amplitude matching and phase matching while achieving a low insertion loss with a single-stage configuration. A first variable resistor and a second variable resistor have resistance values that are equal to each other, and the resistance values are set so as to correct an amplitude error between orthogonal signals of outputs of a first output terminal to a fourth output terminal. A first variable capacitor, a second variable capacitor, a third variable capacitor, and a fourth variable capacitor have capacitance values that are equal to one another, and the capacitance values are set so as to correct a phase error between the orthogonal signals of the outputs of the first output terminal to the fourth output terminal.

Polyphase filter and filter circuit

A transconductance amplifier is provided with: a cross-coupled differential pair () having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors, and a control circuit () comprised of logical circuits, for outputting a binary signal to the common source of each of the differential pair transistors on the basis of an output-level control signal and a polarity control signal which are inputted thereto.

Transconductance amplifier and phase shifter

A semiconductor device for transmitting-signal amplification which has a fine resolution, a high dynamic range, a small occupied area, and low power consumption, is realized. An input signal amplitude is reduced every one half by a ladder network, and a transconductance amplifier stage is arranged corresponding to each node of the ladder network. An output of the transconductance amplifier stage is coupled to an output signal line in common. According to a control word WC&#x3c;&#x3e;, the transconductance amplifier stage is enabled selectively, and the output current which appears in the output signal line is added.

Semiconductor device for signal amplification

The present invention intends to provide a filter circuit in which an area occupied by the circuit can be reduced by suppressing the scale of its circuit configuration while a predetermined vicinity disturbance wave rejection ratio is maintained and a communication semiconductor device using the same, the filter circuit filtering an analog signal and including a voltage/current conversion circuit for converting the analog signal from voltage to current, and a capacitor array which executes signal processing by charging/discharging the current converted by the voltage/current conversion circuit to/from plural capacitors, the capacitor array being so constructed that the plural capacitors are divided to plural stages so that signals averaged by the capacitor on a preceding stage are accumulated in the capacitor on a next stage successively.

Filter circuit and communication semiconductor device using the same

A frequency mixer includes a first N channel MOS transistor, second and third N channel MOS transistors constituting a local oscillator signal differential pair, and having substantially identical properties, a first load, and a second load. The first N channel MOS transistor receives an RF signal at its gate. A local oscillator signal is applied to the gates of the second and third N channel MOS transistors. The drain current of the second and third N channel MOS transistors is output to the drain of the first N channel MOS transistor. An amplitude-current conversion circuit receives the RF signal and provides an output current to the drain of the first N channel MOS transistor to decrease monotonously the output current with respect to the amplitude of the RF signal.

Frequency mixer preventing degradation in linearity on amplitude of input signal

A differential amplifier of an exponentially-changing current producing circuit has a pair of transistors of which bases are connected to each other through a differential base resistor of a resistance value R, a control current of a value K &times;T&minus;(K &times;K &times;T&times;V /K ) produced from a gain control current (K &middot;V ), a gain reference current (K ) and a bias current (K &middot;T) is fed to the base of one transistor, and an exponentially-changing current is output. V denotes a gain control voltage, K , K and K are constant, and T denotes an absolute temperature. An input signal is amplified in a variable gain cell at a gain corresponding to the exponentially-changing current, and an amplified signal is output. Therefore, the gain in the variable gain cell is controlled according to the exponentially-changing current.

Gain control circuit for controlling a gain in a variable gain cell

In cases where a direct-current offset occurs in a differential signal output from a differential signal amplifier when a differential input signal is differentially amplified in a series of differential signal amplifiers, a direct-current offset component amplified is included in a differential signal output from a particular differential signal amplifier. To suppress the direct-current offset component, the differential signal is, at first, differentially amplified in a pair of transistors of a detecting amplifier, the direct-current offset component is extracted in a low-pass filter from the differential signal amplified, and compensating currents produced according to the direct-current offset component are input to a differential signal amplifier preceding to the particular differential signal amplifier to adjust the direct-current offset component of the differential signal to zero. Because the pair of transistors of the detecting amplifier inevitably have a high input impedance, the differential signal can be directly received in the detecting amplifier, so that the low-pass filter can be formed on a minimized layout area without considering its input impedance. Therefore, a multi-stage signal amplifying circuit can be manufactured on a small layout area while preventing a voltage level of the differential signal from exceeding an input dynamic range of the differential signal amplifiers.

Multi-stage signal amplifying circuit

A microwave phase shifter includes bias regulating circuits generating a gate bias of an FET switch element by processing a control voltage generated by the power-source voltage of an external system and applied to the FET switch element in a transformation process. The off-level of the gate bias is set near the pinch-off voltage. As a result, even when the control voltage of the FET switch element which switches the phase shift amount is restricted due to the circumstance of the system power-source, the off-level of the FET element can be set at a potential near the pinch-off voltage and can suppress delay in the rise of the phase shifter output because the off-level exceeds the pinch-off voltage.

Microwave circuit for phase shifting having voltage transforming means to control switching

A gain control circuit includes a first path block for a gain control voltage and a second path block for a reference voltage. The first path block includes a voltage-current linear conversion unit for outputting a current which is proportional to a gain control voltage V.sub.ctrl, and which is inversely proportional to a resistivity, and also includes a temperature characteristic compensation unit for mirroring the current output by the voltage-current linear conversion unit and outputting a current I.sub.ctrl which is proportional to the gain control voltage V.sub.ctrl and an absolute temperature, and which is inversely proportional to the resistivity. The second path block has the same construction as the first path block except that it receives a reference voltage V.sub.ref and outputs a current I.sub.ref. The current I.sub.ctrl and the current I.sub.ref are supplied to a variable- gain cell so as to produce a voltage gain A.sub.v not affected by a variation in temperature.

Gain control circuit for controlling operation of a variable-gain

Current controllers (C1 and C2) are connected to a power source (Vcc) in common through a load (L). Inputs of the current controllers (C1 and C2) are connected to outputs of current amplifier parts (A1 and A2) respectively, and the current amplifier parts (A1 and A2) are connected to a ground level (GND) through constant current sources (CS1 and CS2) respectively. The current amplifier part (A1) has a high gain, and the current amplifier part (A2) has a low gain. Thus, a variable gain amplifier whose input range does not abruptly change with respect to a control voltage is obtained, and a variable gain amplifier widening its input range is provided.

Variable gain amplifier

A microwave semiconductor integrated circuit having high isolation includes a wiring-side substrate including a transmission line in slots at a surface; an element-side substrate having an active element on a surface, the transmission line being embedded in the wiring-side substrate; and metal bumps electrically connecting the transmission line embedded in the wiring-side substrate to electrodes of the active element on the element-side substrate. Therefore, a connection between a transmission line and electrodes of an element, such as an FET or the like, can be easily realized without being affected by a difference in positional level between the transmission line and the electrodes. In addition, the element on the element-side substrate is not adversely affected by the subsequent fabrication of the slots and wiring layers and, therefore, the reliability of the integrated circuit is not adversely affected. Furthermore, since the element and the transmission line are mounted on separate substrates, focusing is easy during the exposure for forming masks used for etching the slots and wiring layers in the wiring-side substrate because there is no unevenness within the substrate surface, facilitating the fabrication of masks.

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Tokyo, Japan

Takaya Maruyama