Sony Corporation

Takaya Hoshino

Kazuhiko Nishibori

Makoto Kondo

Koji Aoyama

Toshio Sarugaku

Yukihiko Mogi

Tetsujiro Kondo

Hideo Nakaya

Masuyoshi Kurokawa

Nobuo Ueki

Ikuo Someya

Seiko Imai

Satoshi Inoue

Kazuo Watanabe

Yasushi Tatehira

Naoki Kobayashi

Masaharu Tokuhara

Masaaki Hattori

Shinichiro Miyazaki

Shizuo Chikaoka

Takeharu Nishikata

Naoki Kaneko

Hirofumi Todo

Hisafumi Motoe

Hiroyuki Kita

Mamoru Kanou

A display device includes: a frame rate conversion section performing frame rate conversion through performing a frame interpolation process on a composite picture frame with use of a motion vector, in which the composite picture frame is generated through superimposing an OSD picture, i.e., on-screen display picture, on a picture frame; and a display section performing picture display based on a frame-rate-converted composite picture frame provided from the frame rate conversion section. The frame rate conversion section selectively performs the frame interpolation process to each pixel or to every plural pixels in the composite picture frame based on OSD region information indicating an OSD picture region.

Display device, frame rate conversion device, and display method

An image signal processing unit includes a frame rate conversion circuit performing double frame rate conversion on an input image signal from a first frame frequency to a second frame frequency. When performing frame rate conversion with the motion correction process, a motion vector is determined between a first frame image and a third frame image, and three interpolation frame images are formed through the motion correction process to the first frame image based on the motion vector, and are inserted between the first and third frame images so as to establish the second frame frequency. When performing frame rate conversion without the motion correction process, an interpolation frame image same as the first frame image is inserted between the first and second frame images, and an interpolation frame image same as the second frame image is inserted between the second and third frame images.

Method and unit to process an image signal involving frame rate conversion to improve image quality

To realize a motion compensation device capable of more appropriately compensating the movement of a video signal subjected to double-speed conversion. A motion vector between an image of a current field in a double-speed-converted video signal and an image of a reference field that is one frame or two frames later is detected, the pixels of the current field are shifted based on the motion vector and the pixels of the reference field are shifted in an opposite direction based on the motion vector. Then simple averaging or weighted average according to the shift amount is performed on the pixels of the current field and the pixels of the reference field to compensate the current field, thereby being capable of compensating the movement between fields so as to be much smoother than conventional cases.

Motion correction device and method

A vector motion detector is provided which corrects the quantity of a motion vector determined with the block matching technique between a reference block taking a reference pixel extracted from a current frame as its origin and a search block extracted from a reference frame and moving within or along the circumference of a search range and which is outside the search range. The vector motion detector makes the motion vector quantity correction so that the motion vector will fall within the search rang. Thus, it can provide a smooth motion of even an image that moves fast.

Motion vector detector and motion vector detecting method

The present invention provides an image signal processing apparatus and a method thereof which perform double-speed conversion on images subjected to telecine conversion and in which a first field is specified based on difference values between pixel signal levels calculated with respect to respective detected pixels, write pixel positions which are shifted from the positions of the detected pixels in the vector directions of motion vectors are calculated in a field following the first field, the calculated write pixel positions are stored in correspondence with the motion vectors, interpolation pixel data is calculated from pixel data read from the first field in correspondence with the stored write pixel positions and motion vectors, and the calculated interpolation pixel data is written into the write pixel positions.

Image signal processing apparatus and processing method

To enable a satisfactory suppression of overemphasized component after converting the number of scanning lines of video signal, when the video signal is converted in the number of scanning lines and a high-frequency component at least in a vertical direction of the converted video signal is emphasized, signals delayed by a plurality of stages of time equal to or more than a time required for converting the number of scanning lines are obtained by a delay circuit, and an appropriate delay signal is selected from among the plurality of delay signals by a selection circuit. The selected delay signal is compared with the emphasized video signal in emphasized-component detector circuitsand the overemphasized component is detected. Processing to suppress the emphasis is performed by suppressor circuitswith respect to a portion where the overemphasized signal component is detected.

Video signal processing method and device

The present invention provides an image signal processing apparatus and a method thereof in which each of the fields forming the unit-frame is specified, with respect to the inputted image signal, based on a difference value calculated in signal level between a detected pixel in a current field and a detected pixel at the same position in a field which comes one frame behind the current field, a motion vector for a field which comes two frames behind the current field is detected, with respect to the detected pixel in the current field, the detected pixel is shifted, with respect to the specified first field, in a direction opposite to the motion vector within the range of the detected motion vector, the detected pixel is shifted, with respect to the specified fourth field, in a direction along the motion vector, and the detected pixels is shifted, with respect to the specified second and third fields, so as to make the pixels gradually closer to the pixel position shifted with respect to the fourth field, in the consecutive order of the fields from the first field, in the direction along the motion vector or in the direction opposite to the motion vector.

It is determined whether each block () including a plurality of pixels extracted from a basic field () has an edge or not, and then which state, stationary or non-stationary, each of the pixels forming together the block () determined to have an edge is. There is calculated an absolute value of a difference between a pixel determined to be non-stationary and a pixel (or) in each pixel position in a reference field () or pixels (to) included in the reference field and adjacent to the non-stationary pixel, and a correlation is found between such pixels in consideration according to the calculated difference absolute-value. A motion vector is determined by the block matching method according to results of the determination, and allocated to each of the pixels. Thus, the motion vector of each block is corrected to an accurate one of each of the pixels.

Motion vector correction circuit and method

An image signal processing apparatus according to the present invention receives an image signal inputted thereto that is generated by subjecting a telecine-converted image to double speed conversion, in which signal one film frame is formed by four fields, identifies a first field on the basis of a difference value calculated between pixel signal levels, and shifts the position of a detected pixel in a vector direction of a motion vector such that an amount of shift is progressively increased as transition is made from the identified first field to the subsequent fields.

Image signal processing apparatus and method

An NTSC signal is supplied to a first area extracting circuit and a second area extracting circuit. The first area extracting circuit extracts class taps from the NTSC signal. The second area extracting circuit extracts predictive taps from the NTSC signal. The first area extracting circuit extracts pixels in predetermined positions from same phase pixels as a considered pixel. Based on level differences between extracted pixels, a pattern detecting section performs a class categorization. A class code determining section generates class codes based on the result of the class categorization and supplies the generated class codes to a coefficient memory. The coefficient memory outputs pre-stored predictive coefficients based on the class codes to a predictive calculating section. The predictive calculating section performs a sum of product calculation of pixel data as predictive taps received from the first area extracting circuit and the predictive coefficients received from the second area extracting circuit and generates for example a component signal Y with the result of the sum of product calculation.

Image information converting apparatus

A simplified Y/C separation circuit in which, a plurality of luminance signals are calculated for the subject pixel based on an NTSC signal of the subject pixel and NTSC signals of pixels that are close to the subject pixel spatially or temporally. Correlations between the plurality of luminance signals are obtained in a difference circuit and a comparison circuit. In a classification circuit, classification is performed, that is, the subject pixel is classified as belonging to a certain class, based on the correlations between the plurality of luminance signals. Prediction coefficients corresponding to the class of the subject pixel are read out from a prediction coefficients memory section. The RGB luminance signals of the subject pixel are then determined by calculating prescribed linear first-order formulae.

Signal conversion apparatus and method

The invention concerns a device and a method for converting a first image signal that is comprised of plural pixel data into a second image data that is comprised of plural pixel data. In particular, according to the image converter and the image converting method of the invention, even if the image quality of the inputted image data is poor, it is able to extract the optimal pixel data as the class tap or the predictive tap, and to perform the adequate prediction processing, since clipping of the class tap or the predictive tap is controlled in response to the feature quantity that represents the quantity of fuzz of the inputted image data.

Image converter and image converting method for improving image quality

A motion detector detects a motion of a video signal by a simple circuit arrangement with high accuracy. The motion detector comprises a first luminance detecting means (42) for detecting a luminance component contained in a composite video signal, a delay circuit (44) for delaying the composite video signal by at least one frame, a second luminance detecting means (45) for detecting a luminance component contained in a signal delayed by the delay circuit (44), a subtracting means (43) for subtracting a luminance component output from the first luminance detecting means (42) and a luminance component output from the second luminance detecting means (45) from each other, a filter (60) for eliminating a frequency band of a color subcarrier from an output of the subtracting means (43), a switching means (50) for selecting an output of the filter (60) and an output of the subtracting means (43) and a chroma component detecting means (50) for detecting a chroma component from the composite video signal, wherein the switching means (46) is controlled on the basis of a chroma component detected by the chroma component detecting means (50) and a motion detection is carried out on the basis of the level of a signal selected by the selecting means (46). A television receiver having a motion detector for a video signal is also provided.

Three-dimensional motion detection

A level detection circuit includes a multiplier and an adder for computing the sums of square values of a burst signal. A maximum value holding circuit holds a maximum value of the sums of the squared values of the burst signal. A counter counts sampling clocks. A multiplier, an adder and a 1/2 processing circuit compute a half value of the sum of two consecutive count values, and a delay circuit, a latch circuit and a comparator generate a first one of the two consecutive count values as a level of the burst signal when an output of the 1/2 processing circuit becomes larger than the output of the maximum value holding circuit. The invention enables level detection by finding a square value using a small circuit.

Level detection circuit and ACC circuit employing the level detection

A time-division bit number circuit that comprises a bit number expansion system and/or a bit number reduction system. The bit number expansion system converts an N bits signal to a 2N bits signal, while the bit number reduction system converts the 2N bits signal to the N bits signal where N is an integer. Thus, according to the time-division bit amount circuit, the number of memory can be saved, the area of circuit can be reduced and the pattern area of substrate can be reduced.

Growing community of inventors

Saitama, Japan

Takaya Hoshino