Sharp Kabushiki Kaisha Corporation

Rohm Co., Ltd.

Takateru Yamamoto

Nobuya Kishi

Akira Hashimoto

Sukenori Ito

Yasunobu Inoue

Keisuke Tateishi

Masako Shinozuka

Kenji Tanaka

Takeshi Nakamura

Susumu Murakami

Shuhji Fujii

Hideshi Izumi

Minoru Tomiyori

Tetsuo Fukumoto

Kouji Miyake

Shoko Uchisako

Hiroki Watanabe

Kazuma Shiomi

Yoshie Iwakura

Tomohiko Okada

Kimihide Tsukamoto

Yoshiaki Ibuchi

Takashi Hori

Motoaki Okitsu

Yasushi Matsutomo

Tadaaki Kawano

Takashi Makiura

Haruyoshi Migita

Kenichiroh Imayoshi

Shinichiro Hiraoka

Akira Kohno

Masashi Tanimoto

Koji Yakushiji

Kunihiko Sakaguchi

Yosuke Kashu

Dai Onimatsu

Hirofusa Takekuma

Atsushi Saito

Yasutaka Kusao

Kouji Aoki

Daisuke Ueda

Sheryll Anne Dayao Joson

Yoshiko Yoshimura

An abnormality detection circuit includes: a plurality of voltage dividing circuits; a first selector configured to select and output one of a plurality of outputs of the plurality of voltage dividing circuits; a first comparator configured to compare an output of the first selector with a reference voltage; and a first detector configured to detect an abnormality based on an output of the first comparator, wherein the selection of the first selector is switched in synchronization with a vertical synchronization signal or a horizontal synchronization signal of a liquid crystal display device.

Abnormality detection circuit

A source driverincludes a first latchoutputting a first data signal D() having multiple bits (e.g., eight bits), a second latchoutputting a second data signal D() by latching the first data signal D() in a plurality of steps in units of one or more bits, a DACconverting the second data signal D() into an analog signal A(), and an amplifierreceiving the analog signal A() to output a source signal S(). The second latchlatches the first data signal D(), e.g., one bit at every clock, one bit at every plurality of clocks, a plurality of bits at every clock, or a plurality of bits at every plurality of clocks.

Source driver

A parallel interface is disclosed. The parallel interface of the present disclosure includes an input unit configured to input, in parallel, a plurality of predetermined data signals and a clock signal; an output unit configured to output, in parallel, the predetermined data signals in synchronization with the clock signal; and a plurality of transmission lines disposed between the input unit and the output unit and configured to transmit, in parallel, the predetermined data signals and the clock signal, wherein the transmission lines are configured with a wiring pattern in which the transmission lines have different electrical lengths and an equal electrical capacitance.

Parallel interface and integrated circuit

A clock signal generating circuit includes: an oscillator having a trimming function of arbitrarily adjusting an oscillation frequency of a first clock signal generated by the oscillator depending on trimming data; and a trimming data modulation part configured to dynamically change a reference trimming data for adjusting the oscillation frequency of the first clock signal to generate modulation trimming data, and output the modulation trimming data, as the trimming data, to the oscillator.

Clock signal generating circuit

A semiconductor device includes: a trimming object circuit configured to use a trimming circuit to adjust an output based on a trimming value; and a trimming value setting circuit configured to set the trimming value. The trimming value setting circuit includes: a register configured to volatilely store a pseudo-trimming value set with reference to a trimming table such that an output value of the trimming object circuit becomes equal to a target value; a trimming value storage configured to non-volatilely store a final trimming value, wherein the final trimming value is set by correcting the pseudo-trimming value with reference to a trimming value correction table such that the output value of the trimming object circuit, which is obtained based on the pseudo-trimming value, becomes equal to the target value; and a selector configured to select one of the pseudo-trimming value and the final trimming value as the trimming value.

Semiconductor device, liquid crystal display and electronic apparatus

An image forming system according to an embodiment of the present invention includes an air cleaner for cleaning air, an image forming apparatus that is settable to a mode for economizing power, and a control unit that causes a display unit of the air cleaner to display an operating state of the image forming apparatus when the image forming apparatus is set to the mode for economizing power. An image forming system according to another embodiment of the present invention includes an image forming apparatus that prints an image on recording paper, an air cleaner that is for cleaning air, and is integrally attached to the image forming apparatus via a support member, and supported above the image forming apparatus by the support member, and a control unit that causes a display unit of the air cleaner to display an operating state of the image forming apparatus.

Image forming system with an air cleaner that displays an operating state of the image forming apparatus

An image compression circuitof the invention includes an image calculator, a compression-system decision unit, and a compression processor. Compression-system decision unitdetermines a variation of pieces of image data of four adjacent pixels based on a variation in luminance Y of the pixels or variations in luminance Y and saturation S of the pixels, compresses the image data into image data of one or two pixels (RGB 888 and RGB 787) expressed by an RGB color space having a small quantization error in the case of the small variation of the pieces of image data, and compresses the image data into data including the luminances of the four adjacent pixels and pieces of image data of two pixels (YCbCr 422) expressed by a YCbCr color space having a large quantization error in the case of the large variation of the pieces of image data.

Image compression circuit for compressing pieces of image data of four adjacent pixels, image compression method, semiconductor device, and smartphone

An image forming system is provided with an Image Forming Operation Unit, an Air Cleaning Operation Unit, a power source, and a Control Unit. The Control Unit has a coordinated OFF control function of coordinating a first power supply OFF control for turning off power supply from the power source to the Image Forming Operation Unit and a second power supply OFF control for turning off power supply from the power source to the Air Cleaning Operation Unit, and the coordinated OFF control function is configured to execute the second power supply OFF control when a preset time period elapses after executing the first power supply OFF control. Also, in the image forming system, an air cleaning operation of an air cleaning apparatus is stopped when an image forming apparatus is set to an a night mode or when a fixed time period elapses after the night mode is set. The air cleaning operation of the air cleaning apparatus is restarted when the image forming apparatus is resumed from the night mode.

Image forming system

A paper feed cassette incorporates a storage portion for standard-sized paper and a storage portion for small-sized paper that has an area smaller than the standard-sized paper, further includes paper conveyance paths for guiding the standard-sized paper and small-sized paper from the respective storage portions to an image forming portion, and these paper conveyance paths share a common vertical portion.

Paper feed structure for an image forming apparatus

In response to a contents data transmission request from a user terminal, a contents storage server encodes a contents data meeting the transmission request by vector coding or hierarchical coding and transmits the encoded contents data to the user terminal. The user terminal having received the encoded data notifies a charging server of information on a resolution selected by the user and then receives information needed for a corresponding decoding process from the charging server. The charging server carries out a charging process based on the received information on the resolution.

Contents providing method, contents providing system, and contents server

An image reading device has a movable platen glass that is rotatably supported, that is substantially a prism having a plurality of read faces, and that is constructed so that rotation of the platen glass can switchably place one of the read faces in the read position. Therefore, even if the platen glass becomes stained, the image reading device makes it possible to start or continue reading document images without requiring labor and time for cleaning the platen glass.

Image reading device and image processing apparatus

An improved document reader is provided, including: a platen for an original document to be placed thereon; and a hold-down member capable of opening and closing relative to the platen and operative to press the original document against the platen so as to make the original document stationary when in a closed state, wherein: the hold-down member includes a plurality of pressing sections arranged adjacent to each other, the pressing sections having respective grips which, except the grip, are engageable with respective notches defined by the pressing sections, respectively.

Document reader and image forming apparatus

Growing community of inventors

Kyoto, Japan

Takateru Yamamoto